5.1 Conclusion
129
On the other hand, nothing prevents one from employing the baseline correction also
for the Huffman to increase the compression. However, the output data will no longer
be lossless, but it will provide more data for analysis than the zero suppression as
data between clusters are not lost. Another objection to the use of Huffman was the
required resources needed in the receiving CRU FPGA to do the decoding of all the
front-end cards originally envisioned to be connected to one CRU [10]. The tested
implementation is, however, not optimal and can be improved upon, though it will
still use more resources than what is needed for processing zero suppressed data or
raw data as in the final implementation. A lack of resources can be alleviated by
adding more CRUs, but this comes down to cost versus quality of results. The final
system for the TPC reduced the sampling rate from 10 to 5 MHz and increased the
number of links from four to eleven, and decreased the link speed to 160 Mbps. With
some analysis of the new detector data to confirm the stability of the signal baseline,
it would be possible to switch the sampling back to using 10 MHZ, and by employing
Huffman, be able to transfer the higher sampled data over the same links.
As it stands, the strength of the SAMPA lies in its versatility, high flexibility, and
configurability, particularly of the digital design, which makes it applicable to a wide
range of gas-based detectors. Its limiting factors are primarily the restricted selection
of analogue gain and shaping times available.
5.2 Outlook
Preparation of the mass-production testing for the devices that eventually will be
used for the upgrade is in the works. The test plan for detection of manufacturing
defects is expected to be the same as used for the previous tests as described in
Sect. 4.3.2.1. The test-framework will though need to be ported to another platform
that can support more devices per DAQ unit.
The ALICE experiment uses a framework called AliRoot [11] for their simulation,
reconstruction, and analysis. The framework is able to simulate the full detector
performance including the readout performance and so in the future, there would be
a need to implement a sufficiently faithful model of the SAMPA as well. An option
that has been investigated, but not evaluated, is to use a program called Verilator [12]
that automatically ports Verilog code to SystemC code. This would simplify the
conversion process by avoiding the need to have a deep knowledge of the design, but
might increase in terms of simulation speed.
The DAQ system was designed with the limitations of the chosen FPGA evaluation
board, the need for testing all digital functionality of the design, and the limited time
frame for the development work. If a detector chooses to base its acquisition system
around the design, some considerations should be taken. For operating with the
SAMPA data links at 320 Mbps, a faster device should be chosen, as the design
currently uses extensive optimization techniques to reach timing, which complicates
the design and makes it hard to maintain. For operating at slower speeds, the design
can be simplified, as was done in the MCH testing. To increase data throughput, it
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