7.3 Using the IEEE Std. 1500 Standard in Order …
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The existing IIPS logic circuit can actually be used both to generate noise and to
minimize hardware costs. Moreover, in order to increase the level of protection, an
IIPS can include several different approaches aimed at other popular attack models.
For instance, a current monitor of supply current levels can be integrated to detect
the behavior of hardware Trojans at run-time [57]. IIPS can also include a safety
controller based on special rules to detect malicious inclusions in an on-chip processor
[72]. Moreover, IIPS allows for joint use to increase SoC testing possibilities, i.e.,
by integration with on-chip testing controller for embedded SoC self-testing (BIST)
[56, 73]. Integration of security functions and testing logics in IIPS can significantly
reduce structural and hardware costs by jointly using a centralized control logic
circuit.
Moreover, relative simplicity of IIPS integration also allows it to be used in large
complex SoC with increasing numbers of internal IPs, since it requires no additional
design efforts to integrate IIPs into larger SoC and achieve the same level of security.
Even though the run of the scan chain and multiplexing of the control signal shall
be performed for each separate core, such process can be automated and performed
after integration of functional IPs, which makes IIPS a scalable set IP suitable for
SoC of different sizes.
As can be understood from the above, IIPS ensures configurability both during the
design stage and during normal operation stage, making it possible to adapt various
subclasses of security functions for various applications or SoC operation modes.
Configurability during design can be ensured by using various compiler directives in
HDL codes (VHDL), which allows the system integrator to enable only the security
function that corresponds the best to its purposes and exclude the rest to reduce
hardware costs.
IIPS can also ensure configurability directly during operation, when activation of
various security measures is based on recognizing actual SoC behavior during the
main operation mode. For example, power-based attacks are more probable in lowpower mode; therefore, IIPS can activate more aggressive countermeasures against
the attacks based on analysis of statistical and dynamic power. Even during the mode
of malfunction testing, it is possible to take necessary safety measures to prevent
modification of testing functions—it all depends on the qualification of microcircuit
developers and security specialists.
To conclude this section, we shall draw brief conclusions.
We have considered an interesting paradigm of building a reliable and secure SoC
structure based on using the IP infrastructure for the purpose of safety. The IIPS
means suggested in the work [32] is actually a self-sufficient functional module built
into a microcircuit, which can be interfaced with other IPs in an SoC and ensures
multiple effective measures for protection of hardware. IIPS module is characterized
by extremely low hardware costs, conforms to the standard test protocol of SoC
checking and has the properties of functional universality, scalability, and configurability. IIPS module comprises the following components: a mechanism that prevents
scanning-based attacks; a basic module of physical uncloneable function (PUF) for
protection from piracy and microcircuit falsification; and test infrastructure to ensure
reliable protection from hardware Trojan attacks.
675
The existing IIPS logic circuit can actually be used both to generate noise and to
minimize hardware costs. Moreover, in order to increase the level of protection, an
IIPS can include several different approaches aimed at other popular attack models.
For instance, a current monitor of supply current levels can be integrated to detect
the behavior of hardware Trojans at run-time [57]. IIPS can also include a safety
controller based on special rules to detect malicious inclusions in an on-chip processor
[72]. Moreover, IIPS allows for joint use to increase SoC testing possibilities, i.e.,
by integration with on-chip testing controller for embedded SoC self-testing (BIST)
[56, 73]. Integration of security functions and testing logics in IIPS can significantly
reduce structural and hardware costs by jointly using a centralized control logic
circuit.
Moreover, relative simplicity of IIPS integration also allows it to be used in large
complex SoC with increasing numbers of internal IPs, since it requires no additional
design efforts to integrate IIPs into larger SoC and achieve the same level of security.
Even though the run of the scan chain and multiplexing of the control signal shall
be performed for each separate core, such process can be automated and performed
after integration of functional IPs, which makes IIPS a scalable set IP suitable for
SoC of different sizes.
As can be understood from the above, IIPS ensures configurability both during the
design stage and during normal operation stage, making it possible to adapt various
subclasses of security functions for various applications or SoC operation modes.
Configurability during design can be ensured by using various compiler directives in
HDL codes (VHDL), which allows the system integrator to enable only the security
function that corresponds the best to its purposes and exclude the rest to reduce
hardware costs.
IIPS can also ensure configurability directly during operation, when activation of
various security measures is based on recognizing actual SoC behavior during the
main operation mode. For example, power-based attacks are more probable in lowpower mode; therefore, IIPS can activate more aggressive countermeasures against
the attacks based on analysis of statistical and dynamic power. Even during the mode
of malfunction testing, it is possible to take necessary safety measures to prevent
modification of testing functions—it all depends on the qualification of microcircuit
developers and security specialists.
To conclude this section, we shall draw brief conclusions.
We have considered an interesting paradigm of building a reliable and secure SoC
structure based on using the IP infrastructure for the purpose of safety. The IIPS
means suggested in the work [32] is actually a self-sufficient functional module built
into a microcircuit, which can be interfaced with other IPs in an SoC and ensures
multiple effective measures for protection of hardware. IIPS module is characterized
by extremely low hardware costs, conforms to the standard test protocol of SoC
checking and has the properties of functional universality, scalability, and configurability. IIPS module comprises the following components: a mechanism that prevents
scanning-based attacks; a basic module of physical uncloneable function (PUF) for
protection from piracy and microcircuit falsification; and test infrastructure to ensure
reliable protection from hardware Trojan attacks.