6.6 Methods of Preparing Samples of Submicron Microcircuits …
597
• Production of IC cleavages;
• Production of thin cross sections.
6.6.1.1 Production of IC Cleavages
Various cleavages are used to study vertical IC topology. Cleavage consists in
breaking a sample into two equal parts. The higher the quality of the cleavage, the
better will be the quality of vertical topology analysis of the examined sample. Cleavages of the highest quality are produced by pricking silicon wafers with integrated
ICs. Since silicon is an ordered lattice, the entire wafer will be pricked strictly parallel
to this lattice. Therefore, wafers with orientation (100) can be pricked both perpendicular to the basic cutoff and parallel to it. In this case, the cleavage is perfectly
smooth, without any tears or irregularities. Such cleavages are the most valuable;
they provide the most complete information about vertical IC topology. Wafers with
the (111) orientation can be pricked at different angles. In order to properly direct
the cleavage line, a cut is made on the reverse (non-planar) side of the silicon wafer
with a scriber. After that, the wafer is broken along the cut. It results in a relatively
smooth cleavage, inferior to the cleavage on a wafer with the orientation (100) in
terms of characteristics. If it is necessary to examine the vertical topology of the IC
chip, the notch on the reverse side of the chip is made with the help of a special
machine using a disk with diamond coating as a cutting tool. The advantage of this
cutting method is that the cutting direction and depth can be adjusted. Thus, hitting
the necessary field of the microcircuit becomes easier. Disadvantage of such method
of chip cutting is the bad quality of the cleavage. The cleavage turns out to be torn,
which complicates the analysis of vertical IC topology.
6.6.1.2 Production of Thin Sections
Thin sections can be used for layer-by-layer analysis of the surface or cross section of
the examined sample. The essence of this method consists in placing the examined
sample on a special holder in the thin section production unit with the examined
side up. Either the surface of the sample or its cleavage can be examined. After
that, the grinding disk is used to grind the sample with layer-by-layer removal of the
applied layers. Grinding is performed until the required layer of the IC is reached.
Grinding rate is adjusted by the force of the sample pressing against the rotating
grinding wheel. After that, the layer is polished on a special polishing wheel using
fine polishing paste.
The last operation is the most important, since the quality of thin sections depends
on the quality of polishing. The surface of the sample after polishing shall be even
and smooth, without scratches. Therefore, the main problem arising during sample
polishing is the problem of relief, i.e., uneven profile along the sample. These profiles
can exist within one phase as well as across phase borders. Although this effect is
most pronounced at grain boundaries, changes within the grain can be as large as
597
• Production of IC cleavages;
• Production of thin cross sections.
6.6.1.1 Production of IC Cleavages
Various cleavages are used to study vertical IC topology. Cleavage consists in
breaking a sample into two equal parts. The higher the quality of the cleavage, the
better will be the quality of vertical topology analysis of the examined sample. Cleavages of the highest quality are produced by pricking silicon wafers with integrated
ICs. Since silicon is an ordered lattice, the entire wafer will be pricked strictly parallel
to this lattice. Therefore, wafers with orientation (100) can be pricked both perpendicular to the basic cutoff and parallel to it. In this case, the cleavage is perfectly
smooth, without any tears or irregularities. Such cleavages are the most valuable;
they provide the most complete information about vertical IC topology. Wafers with
the (111) orientation can be pricked at different angles. In order to properly direct
the cleavage line, a cut is made on the reverse (non-planar) side of the silicon wafer
with a scriber. After that, the wafer is broken along the cut. It results in a relatively
smooth cleavage, inferior to the cleavage on a wafer with the orientation (100) in
terms of characteristics. If it is necessary to examine the vertical topology of the IC
chip, the notch on the reverse side of the chip is made with the help of a special
machine using a disk with diamond coating as a cutting tool. The advantage of this
cutting method is that the cutting direction and depth can be adjusted. Thus, hitting
the necessary field of the microcircuit becomes easier. Disadvantage of such method
of chip cutting is the bad quality of the cleavage. The cleavage turns out to be torn,
which complicates the analysis of vertical IC topology.
6.6.1.2 Production of Thin Sections
Thin sections can be used for layer-by-layer analysis of the surface or cross section of
the examined sample. The essence of this method consists in placing the examined
sample on a special holder in the thin section production unit with the examined
side up. Either the surface of the sample or its cleavage can be examined. After
that, the grinding disk is used to grind the sample with layer-by-layer removal of the
applied layers. Grinding is performed until the required layer of the IC is reached.
Grinding rate is adjusted by the force of the sample pressing against the rotating
grinding wheel. After that, the layer is polished on a special polishing wheel using
fine polishing paste.
The last operation is the most important, since the quality of thin sections depends
on the quality of polishing. The surface of the sample after polishing shall be even
and smooth, without scratches. Therefore, the main problem arising during sample
polishing is the problem of relief, i.e., uneven profile along the sample. These profiles
can exist within one phase as well as across phase borders. Although this effect is
most pronounced at grain boundaries, changes within the grain can be as large as