5.4 Specific Examples from the Experience of Belarusian Trojan Hunters
487
In case of production at uncertified plants, there is a high possibility of introducing uncontrollable changes into the topology of masks and manufactures ICs,
even though the topology was developed in a Belarusian or Russian design center.
What are the ways of finding such changes (Trojans)? The simplest method is
checking masks for correspondence to source data of the engineering design. For this
purpose, the mask is scanned using a high-resolution CCD array, and the obtained
results (image) are compared to the topology image from the project pixel by pixel.
All identified differences are carefully analyzed. This method helps identify the
differences of the topology of a manufactured mask from the original design and is
the most informative.
However, it is clear that if wafers are manufactured overseas, it is impossible to
perform verification of masks. Firstly, the contractor hardly ever transfers such masks
to the customer; secondly, it is technically simple to replace the masks during this
stage. Therefore, it is extremely important to specifically test the manufactured ICs.
Special attention shall be paid to the layers responsible for formation of the active
structure, contacts to the active regions, and metals 1 and 2.
When analyzing an IC, it is important to identify the technological layer that is
best suited for decoration for the purpose of analysis. In this, it is necessary to act
in accordance with the following principles: reliability (authenticity) of decoration
and dimensions of the minimum decorated region. It is clear that gate regions are
perhaps easier to identify; however, these regions have the smallest dimensions,
and there is a possibility of skipping an element or falsely identifying it during the
automatic control process. Active regions are significantly larger, and they can be
reliably decorated during preparation of samples.
The next important step of sample preparation is ensuring high contrast of the
image. During this stage, it is necessary to experimentally select such solutions that
would help distinguish the active region from other regions with a contrast of at least
50% in the range of DUV waves.
Control of prepared samples shall be performed with similar equipment,
comparing the image of the active region to the topology image of the original project.
Clearly, such equipment will be much more complex than standard equipment in
terms of control of masks, since the controlled samples always have differences (see
Table 5.1).
Table 5.1 Technological differences in automatic control for the presence of additional wafer and
mask elements
Parameter
Wafer
Mask
Light source
Reflected
Passing
Minimum size
A
4xA
Contrast in DUV
? (25%)
95%
Marks for precise binding of the topology
Probably present
Present
Distortion of the topology relative to the project
Unpredictable
Minimal
Presence of defects after decoration
High probability
Minimal
487
In case of production at uncertified plants, there is a high possibility of introducing uncontrollable changes into the topology of masks and manufactures ICs,
even though the topology was developed in a Belarusian or Russian design center.
What are the ways of finding such changes (Trojans)? The simplest method is
checking masks for correspondence to source data of the engineering design. For this
purpose, the mask is scanned using a high-resolution CCD array, and the obtained
results (image) are compared to the topology image from the project pixel by pixel.
All identified differences are carefully analyzed. This method helps identify the
differences of the topology of a manufactured mask from the original design and is
the most informative.
However, it is clear that if wafers are manufactured overseas, it is impossible to
perform verification of masks. Firstly, the contractor hardly ever transfers such masks
to the customer; secondly, it is technically simple to replace the masks during this
stage. Therefore, it is extremely important to specifically test the manufactured ICs.
Special attention shall be paid to the layers responsible for formation of the active
structure, contacts to the active regions, and metals 1 and 2.
When analyzing an IC, it is important to identify the technological layer that is
best suited for decoration for the purpose of analysis. In this, it is necessary to act
in accordance with the following principles: reliability (authenticity) of decoration
and dimensions of the minimum decorated region. It is clear that gate regions are
perhaps easier to identify; however, these regions have the smallest dimensions,
and there is a possibility of skipping an element or falsely identifying it during the
automatic control process. Active regions are significantly larger, and they can be
reliably decorated during preparation of samples.
The next important step of sample preparation is ensuring high contrast of the
image. During this stage, it is necessary to experimentally select such solutions that
would help distinguish the active region from other regions with a contrast of at least
50% in the range of DUV waves.
Control of prepared samples shall be performed with similar equipment,
comparing the image of the active region to the topology image of the original project.
Clearly, such equipment will be much more complex than standard equipment in
terms of control of masks, since the controlled samples always have differences (see
Table 5.1).
Table 5.1 Technological differences in automatic control for the presence of additional wafer and
mask elements
Parameter
Wafer
Mask
Light source
Reflected
Passing
Minimum size
A
4xA
Contrast in DUV
? (25%)
95%
Marks for precise binding of the topology
Probably present
Present
Distortion of the topology relative to the project
Unpredictable
Minimal
Presence of defects after decoration
High probability
Minimal