5.3 Features of Identifying Sequential Hardware Trojans Using the TeSR Method
479
Fig. 5.6 Generalized model and examples of a sequential hardware Trojan (a), synchronous counter
(b), rarely activated finite state machine (FSM) (c), hardware Trojan MOLES (d) [3]
the payload of the hardware Trojan. Separate specific conditions of state transition
are designated as partial trigger conditions (PTC). Another type of serial hardware
Trojans [4] with passive payload consists of a linear shift feedback register (LSFR),
which is used to organize a secret key leakage channel (side channel, loophole, etc.)
in cryptographic hardware by facilitating attack via such side channels, as shown in
Fig. 7.6d.
We have already considered various methods of hardware Trojan detection, each
of which has its own advantages as well as limitations. In practice, most methods act
as additional detection mechanisms, ensuring unique coverage for specific models of
various hardware Trojans. For example, hardware Trojan detection methods based
on the analysis of the leakage current magnitude may be an extremely effective
means for detecting large sequential hardware Trojans that contribute a lot to the
formation of traces of additional power leaking out to the displays of measurement
systems, while methods based on logical decisions are suitable for activating and
identifying small combinational hardware Trojans, which can be easily overlooked
during post-production control.
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