438
4 Hardware Trojans in Microcircuits
30. Y. Alkabani, F. Koushanfar, Active hardware metering for intellectual property protection and
security, in Proceedings of the 16th USENIX Security Symposium (2007), pp. 291–306
31. F. Koushanfar, I. Hong, M. Potkonjak, Behavioral synthesis techniques for intellectual property protection, ACM Trans. Design Autom. Electron. Syst. 10(3), 523–545 (2005). A. Kahng
et al. Robust IP watermarking methodologies for physical design, in Proceedings of the
ACM/IEEE Design Automation Conference (1998), pp. 782–787
32. J. Lach, W Mangione-Smith, M. Potkonjak, FPGA fingerprinting techniques for protecting
intellectual property, in Proceedings of IEEE Custom Integrated Circuits Conference (1998),
pp. 299–302
33. G. Wolfe, J.L. Wong, M. Potkonjak, Watermarking graph partitioning solutions, in Proceedings of the ACM/IEEE Design Automation Conference (2001), pp. 486–489
34. C. Alpert, A. Kahng, Recent directions in netlist partitioning. Integration VLSI J. 19(1–2),
1–81 (1995)
35. F. Koushanfar, Y. Alkabani, Provably secure obfuscation of diverse watermarks for sequential
circuits, in Proceedings of The IEEE International Symposium on Hardware Oriented Security
and Trust (2010), pp. 42–47
36. A. Caldwell et al., Effective iterative techniques for fingerprinting design IP, IEEE Trans.
Comput.-Aided Des. Integr. Circ. Syst. 23(2), 208–215 (2004)
37. J.B. Wendt, F. Koushanfar, M. Potkonjak, Techniques for foundry identification, in Proceeding
of the Design Automation Conference (2014). https://doi.org/10.1145/2593069.2593228
38. D. Holcomb, W. Burleson, K. Fu, Power-up SRAM state as an identifying fingerprint and
source of true random numbers. IEEE Trans. Comput. 58(9), 1198–1210 (2009)
39. Defense Advanced Research Projects Agency (DARPA), Supply Chain Hardware Integrity
for Electronics Defense (SHIELD), Microsystems Technology Office/MTO Broad Agency
Announcement (2014)
40. F. Koushanfar and R. Karri. Can the shield protect our integrated circuits? in Proceedings of
the Midwest Symposium on Circuits and Systems (2014), pp. 51–57
41. M. Rostami, M. Majzoobi, F. Koushanfar, D. Wallach, S. Devadas, Robust and reverse engineering resilient puf authentication and key-exchange by substring matching. IEEE Trans.
Emerg. Top. Comput. 2(1), 37–49 (2014)
42. Y. Alkabani, F. Koushanfar, N. Kiyavash, M. Potkonjak, Trusted integrated circuits: a nondestructive hidden characteristics extraction approach, in Information Hiding, Series. Lecture
Notes in Computer Science, vol. 5284 (Springer, Berlin, Germany, 2008), pp. 102–117
43. U. Ruhrmair, S. Devadas, F. Koushanfar, Security based on physical unclonability and disorder
Introduction to Hardware Security and Trust (Springer, New York, NY, USA, 2011)
44. J. Rajendran, Y Pino, O. Sinanoglu and R. Karri. Security analysis of logic obfuscation, in
Proceedings of the IEEE/ACM Design Automation Conference (2012), pp. 83–89
45. A. Baumgarten, A. Tyagi, J. Zambreno, Preventing IC piracy using reconfigurable logic
barriers. IEEE Des. Test Comput. 27(1), 66–75 (2010)
46. Y. Alkabani, F. Koushanfar and M. Potkonjak. Remote activation of ICs for piracy prevention
and digital right management, in Proc. IEEE/ACM Int. Conf. Comput.-Aided Design, 2007.
P. 674-677
47. R. Chakraborty, S. Bhunia, RTL hardware IP protection using key-based control and data flow
obfuscation, in Proceedings of the IEEE International Conference on VLSI Design (2010),
405–410
48. R. Chakraborty, S. Bhunia. Hardware protection and authentication through netlist level obfuscation, in Proceedings of the IEEE/ACM International Conference on Computer-Aided Design
(2008), pp. 674–677
49. R.S. Chakraborty, S. Bhunia, Security against hardware Trojan through a novel application of
design obfuscation, in Proceedings of the IEEE/ACM International Conference on ComputerAided Design—Digest of Technical Papers, 2009 (ICCAD 2009) (2009), pp. 113–116
50. F. Koushanfar, G. Qu, Hardware metering, in Proceedings of the IEEE/ACM Design
Automation Conference (2001), pp. 490–493
4 Hardware Trojans in Microcircuits
30. Y. Alkabani, F. Koushanfar, Active hardware metering for intellectual property protection and
security, in Proceedings of the 16th USENIX Security Symposium (2007), pp. 291–306
31. F. Koushanfar, I. Hong, M. Potkonjak, Behavioral synthesis techniques for intellectual property protection, ACM Trans. Design Autom. Electron. Syst. 10(3), 523–545 (2005). A. Kahng
et al. Robust IP watermarking methodologies for physical design, in Proceedings of the
ACM/IEEE Design Automation Conference (1998), pp. 782–787
32. J. Lach, W Mangione-Smith, M. Potkonjak, FPGA fingerprinting techniques for protecting
intellectual property, in Proceedings of IEEE Custom Integrated Circuits Conference (1998),
pp. 299–302
33. G. Wolfe, J.L. Wong, M. Potkonjak, Watermarking graph partitioning solutions, in Proceedings of the ACM/IEEE Design Automation Conference (2001), pp. 486–489
34. C. Alpert, A. Kahng, Recent directions in netlist partitioning. Integration VLSI J. 19(1–2),
1–81 (1995)
35. F. Koushanfar, Y. Alkabani, Provably secure obfuscation of diverse watermarks for sequential
circuits, in Proceedings of The IEEE International Symposium on Hardware Oriented Security
and Trust (2010), pp. 42–47
36. A. Caldwell et al., Effective iterative techniques for fingerprinting design IP, IEEE Trans.
Comput.-Aided Des. Integr. Circ. Syst. 23(2), 208–215 (2004)
37. J.B. Wendt, F. Koushanfar, M. Potkonjak, Techniques for foundry identification, in Proceeding
of the Design Automation Conference (2014). https://doi.org/10.1145/2593069.2593228
38. D. Holcomb, W. Burleson, K. Fu, Power-up SRAM state as an identifying fingerprint and
source of true random numbers. IEEE Trans. Comput. 58(9), 1198–1210 (2009)
39. Defense Advanced Research Projects Agency (DARPA), Supply Chain Hardware Integrity
for Electronics Defense (SHIELD), Microsystems Technology Office/MTO Broad Agency
Announcement (2014)
40. F. Koushanfar and R. Karri. Can the shield protect our integrated circuits? in Proceedings of
the Midwest Symposium on Circuits and Systems (2014), pp. 51–57
41. M. Rostami, M. Majzoobi, F. Koushanfar, D. Wallach, S. Devadas, Robust and reverse engineering resilient puf authentication and key-exchange by substring matching. IEEE Trans.
Emerg. Top. Comput. 2(1), 37–49 (2014)
42. Y. Alkabani, F. Koushanfar, N. Kiyavash, M. Potkonjak, Trusted integrated circuits: a nondestructive hidden characteristics extraction approach, in Information Hiding, Series. Lecture
Notes in Computer Science, vol. 5284 (Springer, Berlin, Germany, 2008), pp. 102–117
43. U. Ruhrmair, S. Devadas, F. Koushanfar, Security based on physical unclonability and disorder
Introduction to Hardware Security and Trust (Springer, New York, NY, USA, 2011)
44. J. Rajendran, Y Pino, O. Sinanoglu and R. Karri. Security analysis of logic obfuscation, in
Proceedings of the IEEE/ACM Design Automation Conference (2012), pp. 83–89
45. A. Baumgarten, A. Tyagi, J. Zambreno, Preventing IC piracy using reconfigurable logic
barriers. IEEE Des. Test Comput. 27(1), 66–75 (2010)
46. Y. Alkabani, F. Koushanfar and M. Potkonjak. Remote activation of ICs for piracy prevention
and digital right management, in Proc. IEEE/ACM Int. Conf. Comput.-Aided Design, 2007.
P. 674-677
47. R. Chakraborty, S. Bhunia, RTL hardware IP protection using key-based control and data flow
obfuscation, in Proceedings of the IEEE International Conference on VLSI Design (2010),
405–410
48. R. Chakraborty, S. Bhunia. Hardware protection and authentication through netlist level obfuscation, in Proceedings of the IEEE/ACM International Conference on Computer-Aided Design
(2008), pp. 674–677
49. R.S. Chakraborty, S. Bhunia, Security against hardware Trojan through a novel application of
design obfuscation, in Proceedings of the IEEE/ACM International Conference on ComputerAided Design—Digest of Technical Papers, 2009 (ICCAD 2009) (2009), pp. 113–116
50. F. Koushanfar, G. Qu, Hardware metering, in Proceedings of the IEEE/ACM Design
Automation Conference (2001), pp. 490–493