4.1 Basis of Designing Safe Electronic …
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Goals of the intruder
Attack
Location of the intruder
Data leak
Alteration of
function
Reduced reliability
Operational failure
Project theft
Trade secrets
Hardware Trojan
IP piracy
Reverse Engineering
Analysis of side channels
Fraud
Third party
SoC integration device
Semiconductor production
Board assembly point
Testing point
Processing point
End User
Fig. 4.14 Systematization of the equipment security levels in relation to the attack method
Hardware Trojan
programs
Pirate ICs and
additional ICs
Reverse Engineering
Side channels
Counterfeit ICs
Aggressive factor
Countermeasures
Security parameter
Design blurring
IP watermarking
Fingerprinting
IC measurement
Distributed production
IC camouflaging
Reduction of the volume of leaked
IC data
Key-based authentication
Jamming
Protective scanning
Function of preventing
physical repetitions
Aging sensor
Number of attempts to unlock a
secret (or action)
Number of conflicts
Amount of leaked information
Probability of false positive
Gap between chips / structures
(response)
Number of independent identifiers /
keys
Stability of off-chip responses to
requests
Detection possibility
Fig. 4.15 Schematic drawing of the generalized diagram of interaction