84
F. Firouzi et al.
Fig. 2.25 The general
structure of the clock tree of
Cortex-M series
System Clock
External Clock
Internal Clock
HSI
MCI RC
PLL
LSE
HSE
Crystal or
Resonator
Clock
generating
circuit
An internal clock can be created using the following:
• High-Speed Internal (HSI) – A precise, RC-based, high-speed internal clock with
a manufacturer set tolerance level of at least 1%.
• Multi-Speed Internal (MSI) RC – An RC-based clock source generating clock
in various frequencies that can be trimmed using software. Typically, MSI is
capable of providing about 12 different clock frequencies in most Cortex-M
MCUs.
• Phase-Locked Loop (PLL) – PLL receives data from the HSE or MSI clocks and
uses it to create different system clocks.
2.5.5 Interrupts
A simple analogy is best to help explain the basic concept of how things work
with interrupts and without interrupts. When boiling eggs for 10 minutes, one might
simply glance at the clock every few minutes to determine when 10 minutes have
passed. This is also true with embedded systems. When waiting for a specific status
change to happen before taking action, then one could check the state periodically.
Similarly, if the program is pending for a GPIO input level to move from 1 to 0
before advancing to the next step, then you could repeatedly test the GPIO value.
This approach is called “polling.”
Polling is an uncomplicated manner of confirming status; however, it does have a
drawback. If the status check interval is too long, you risk missing the status change
entirely because the state could revert back again before the next checkpoint. A
shorter interval can provide quicker, dependable detection but also requires longer
processing time and higher power consumption because many status checks will
return a negative result.
An alternative to polling is the utilization of interrupts. To revisit our boiling
egg analogy, when cooking the eggs, you could set a timer for 10 minutes and then
carry on with another activity until the timer goes off, telling us to come back to the
F. Firouzi et al.
Fig. 2.25 The general
structure of the clock tree of
Cortex-M series
System Clock
External Clock
Internal Clock
HSI
MCI RC
PLL
LSE
HSE
Crystal or
Resonator
Clock
generating
circuit
An internal clock can be created using the following:
• High-Speed Internal (HSI) – A precise, RC-based, high-speed internal clock with
a manufacturer set tolerance level of at least 1%.
• Multi-Speed Internal (MSI) RC – An RC-based clock source generating clock
in various frequencies that can be trimmed using software. Typically, MSI is
capable of providing about 12 different clock frequencies in most Cortex-M
MCUs.
• Phase-Locked Loop (PLL) – PLL receives data from the HSE or MSI clocks and
uses it to create different system clocks.
2.5.5 Interrupts
A simple analogy is best to help explain the basic concept of how things work
with interrupts and without interrupts. When boiling eggs for 10 minutes, one might
simply glance at the clock every few minutes to determine when 10 minutes have
passed. This is also true with embedded systems. When waiting for a specific status
change to happen before taking action, then one could check the state periodically.
Similarly, if the program is pending for a GPIO input level to move from 1 to 0
before advancing to the next step, then you could repeatedly test the GPIO value.
This approach is called “polling.”
Polling is an uncomplicated manner of confirming status; however, it does have a
drawback. If the status check interval is too long, you risk missing the status change
entirely because the state could revert back again before the next checkpoint. A
shorter interval can provide quicker, dependable detection but also requires longer
processing time and higher power consumption because many status checks will
return a negative result.
An alternative to polling is the utilization of interrupts. To revisit our boiling
egg analogy, when cooking the eggs, you could set a timer for 10 minutes and then
carry on with another activity until the timer goes off, telling us to come back to the