9 Emerging Hardware Technologies for IoT Data Processing
435
Software
Hardware
Node
Software
Hardware
Server
Fig. 9.1 Data communication among the main IoT components
for high-performance data processing, the IoT nodes are optimized for computation
at low power consumption in the presence of communication noise. To serve the user
requests, semantic and service components are necessary to operate in tandem. The
semantic component receives the requests and understands the details of requested
services by the user (Fig. 9.1). The service component then receives the details and
serves the requests accordingly while maintaining the service quality high [7].
9.1.2 Energy Efficiency as a Paramount Concern
During the past two decades, power has become the central design problem that
limits the performance of computer systems. Data movement is identified as
one of the most significant contributors to energy dissipation in all classes of
microprocessors [8–10]. In particular, the energy cost of moving data across the
memory hierarchy in next-generation microprocessors is expected to be orders of
magnitude higher than the energy cost of performing a floating-point operation [11,
12]. For example, Fig. 9.2 illustrates the relative energy expended for reading data
from DRAM and performing a double precision addition on a graphics processing
unit (GPU) implemented at the 22 nm technology node. The energy required to fetch
the two operands from DRAM is 50× greater than the energy required to move the
operands from the edge of the GPU chip to its center, which itself is another 10×
higher than the cost of the actual addition.
Novel hardware and software techniques are required to bridge this significant
energy gap between data movement and computation in modern computer systems.
This requirement will pose a more critical challenge in designing future computer
systems, because the gap between the energy cost of data movement and computation is expected to widen in next technology generations [8, 9]. Thus, minimizing
data movement is a first-order design constraint for future computer systems. Notice
that near-data processing with the help of recent innovations in 3D die-stacking
alleviates the amount of chip-to-chip communication significantly [13]. These
solutions, however, become less effective for extremely large workloads that span
across multiple chips and cannot improve the energy efficiency of data movement in
the processors and memory packages. Nevertheless, it is unclear how current threedimensional (3D) die-stacking solutions can amortize the implementation costs and
435
Software
Hardware
Node
Software
Hardware
Server
Fig. 9.1 Data communication among the main IoT components
for high-performance data processing, the IoT nodes are optimized for computation
at low power consumption in the presence of communication noise. To serve the user
requests, semantic and service components are necessary to operate in tandem. The
semantic component receives the requests and understands the details of requested
services by the user (Fig. 9.1). The service component then receives the details and
serves the requests accordingly while maintaining the service quality high [7].
9.1.2 Energy Efficiency as a Paramount Concern
During the past two decades, power has become the central design problem that
limits the performance of computer systems. Data movement is identified as
one of the most significant contributors to energy dissipation in all classes of
microprocessors [8–10]. In particular, the energy cost of moving data across the
memory hierarchy in next-generation microprocessors is expected to be orders of
magnitude higher than the energy cost of performing a floating-point operation [11,
12]. For example, Fig. 9.2 illustrates the relative energy expended for reading data
from DRAM and performing a double precision addition on a graphics processing
unit (GPU) implemented at the 22 nm technology node. The energy required to fetch
the two operands from DRAM is 50× greater than the energy required to move the
operands from the edge of the GPU chip to its center, which itself is another 10×
higher than the cost of the actual addition.
Novel hardware and software techniques are required to bridge this significant
energy gap between data movement and computation in modern computer systems.
This requirement will pose a more critical challenge in designing future computer
systems, because the gap between the energy cost of data movement and computation is expected to widen in next technology generations [8, 9]. Thus, minimizing
data movement is a first-order design constraint for future computer systems. Notice
that near-data processing with the help of recent innovations in 3D die-stacking
alleviates the amount of chip-to-chip communication significantly [13]. These
solutions, however, become less effective for extremely large workloads that span
across multiple chips and cannot improve the energy efficiency of data movement in
the processors and memory packages. Nevertheless, it is unclear how current threedimensional (3D) die-stacking solutions can amortize the implementation costs and