258
D. Gorodecky and T. Villa
2. Butler, J.T., Sasao, T.: Fast hardware computation of x mod z. In: 25th IEEE International
Parallel and Distributed Processing Symposium Anchorage, Alaska, May 16–17, pp. 289–292
(2011)
3. Cherviakov, N.I., et al.: Modular structures of parallel computing systems for neuroprocessor,
Moscow, 288 pp. (2003) (in Russian)
4. Ding, C., Pei, D., Pei, T., Salomaa, A.: Chinese Remainder Theorem: Applications in
Computing, Coding, Cryptography. Harbin Institute of Technology Press, Harbin (1996)
5. Dorf, R.C.: Computers, Software, Engineering and Digital Devices, 576 pp. Taylor and Francis,
Boca Raton (2006)
6. Flatt, H., Hesselbarth, S., Flugel, S., Pirsch, P.: A modular coprocessor architecture for
embedded real-time image and video signal processing. In: Proceedings of Embedded Computer Systems: Architectures, Modeling, and Simulation, 7th International Workshop, Samos,
pp. 241–250 (2007)
7. Gorodecky, D.: Hardware realization of X (mod P). In: Proceedings of the International
scientific-practical conference “Actual problems of Radio Physics”, Tomsk, October 3–6, 2013.
Izvestia VUZov. Physic., vol. 56. 9/2, pp. 198–199
8. https://embedded.eecs.berkeley.edu/pubs/downloads/espresso/index.htm
9. http://www.computer-museum.ru/histussr/sokconf0.htm
10. Irhin, V.P.: Tabular implementation of modular arithmetic operations // Sb.nauch.tr. YUbilejnoj
Mezhdunarodnoj nauchno-tekhnicheskoj konferencii 50 let modulyarnoj arifmetiki, pp. 268–
273 (2005) (in Russian)
11. Low, J.Y.S., Chang, C.H.: A new approach to the design of efficient residue generators for
arbitrary moduli. IEEE Trans. Circuits Syst. I Reg. Pap. 60, 2366–2374 (2013)
12. Malashevich, B.M.: Unknown modular supercomputers. In: Proceedings of Conference for 50
Years of Modular Arithmetic, Nov. 23–25, pp. 50–70 (2005) (in Russian)
13. Mohan, P.V.A.: Residue Number Systems. Theory and Applications. Birkhäuser (Springer),
Basel (2016)
14. Mohan, P.V.A.: Efficient design of binary to RNS converters. J. Circuit. Syst. Comput. 9, 145–
154 (1999)
15. Montgomery, P.L.: Modular multiplication without trial division mathematics of computation.
Math. Comput. 44(170), 519–521 (1985)
16. Omondi, A.R., Premkumar, B.: Residue Number System: Theory and Implementation. Imperial College Press, London (2007)
17. Ozturk, E., Sunar, B., Savas, E.: Low-power elliptic curve cryptography using scaled modular
arithmetic, In: Proceedings of the 6th International Workshop Cryptographic Hardware in
Embedded Systems, Cambridge, Aug. 11–13, vol. 3156, pp. 92–106 (2004)
18. Piestrak, S.J.: Design of residue generators and multi-operand modulo adders using carry save
adders. In: Proceedings of the 10th Symposium on Computer Arithmetic, Grenoble, 26–28
June 1991, pp. 100–107 (1991)
19. Premkumar, A.B.: A formal framework for conversion from binary to residue numbers. IEEE
Trans. Circuits Syst. 49, 135–144 (2002)
20. Premkumar, A.B., Ang, E.L., Lai, E.M.K.: Improved memory-less RNS forward converter
based on periodicity of residues. IEEE Trans. Circuits Syst. 53, 133–137 (2006)
21. Sousa, L., Chaves, R.: A universal architecture for designing efficient modulo 2 n ± 1
multipliers. IEEE Trans. Circuits Syst. 52(6), 1166–1178 (2005)
22. Will, M.A., K.L.K. Ryan, Computing Mod Without Mod. https://eprint.iacr.org/2014/755.pdf
23. Zimmermann, R.: Efficient VLSI implementation of modulo 2 n +1 addition and multiplication.
In:14th IEEE Symposium on Computer Arithmetic, Adelaide, April 14–16, pp. 158–167
(1999)
D. Gorodecky and T. Villa
2. Butler, J.T., Sasao, T.: Fast hardware computation of x mod z. In: 25th IEEE International
Parallel and Distributed Processing Symposium Anchorage, Alaska, May 16–17, pp. 289–292
(2011)
3. Cherviakov, N.I., et al.: Modular structures of parallel computing systems for neuroprocessor,
Moscow, 288 pp. (2003) (in Russian)
4. Ding, C., Pei, D., Pei, T., Salomaa, A.: Chinese Remainder Theorem: Applications in
Computing, Coding, Cryptography. Harbin Institute of Technology Press, Harbin (1996)
5. Dorf, R.C.: Computers, Software, Engineering and Digital Devices, 576 pp. Taylor and Francis,
Boca Raton (2006)
6. Flatt, H., Hesselbarth, S., Flugel, S., Pirsch, P.: A modular coprocessor architecture for
embedded real-time image and video signal processing. In: Proceedings of Embedded Computer Systems: Architectures, Modeling, and Simulation, 7th International Workshop, Samos,
pp. 241–250 (2007)
7. Gorodecky, D.: Hardware realization of X (mod P). In: Proceedings of the International
scientific-practical conference “Actual problems of Radio Physics”, Tomsk, October 3–6, 2013.
Izvestia VUZov. Physic., vol. 56. 9/2, pp. 198–199
8. https://embedded.eecs.berkeley.edu/pubs/downloads/espresso/index.htm
9. http://www.computer-museum.ru/histussr/sokconf0.htm
10. Irhin, V.P.: Tabular implementation of modular arithmetic operations // Sb.nauch.tr. YUbilejnoj
Mezhdunarodnoj nauchno-tekhnicheskoj konferencii 50 let modulyarnoj arifmetiki, pp. 268–
273 (2005) (in Russian)
11. Low, J.Y.S., Chang, C.H.: A new approach to the design of efficient residue generators for
arbitrary moduli. IEEE Trans. Circuits Syst. I Reg. Pap. 60, 2366–2374 (2013)
12. Malashevich, B.M.: Unknown modular supercomputers. In: Proceedings of Conference for 50
Years of Modular Arithmetic, Nov. 23–25, pp. 50–70 (2005) (in Russian)
13. Mohan, P.V.A.: Residue Number Systems. Theory and Applications. Birkhäuser (Springer),
Basel (2016)
14. Mohan, P.V.A.: Efficient design of binary to RNS converters. J. Circuit. Syst. Comput. 9, 145–
154 (1999)
15. Montgomery, P.L.: Modular multiplication without trial division mathematics of computation.
Math. Comput. 44(170), 519–521 (1985)
16. Omondi, A.R., Premkumar, B.: Residue Number System: Theory and Implementation. Imperial College Press, London (2007)
17. Ozturk, E., Sunar, B., Savas, E.: Low-power elliptic curve cryptography using scaled modular
arithmetic, In: Proceedings of the 6th International Workshop Cryptographic Hardware in
Embedded Systems, Cambridge, Aug. 11–13, vol. 3156, pp. 92–106 (2004)
18. Piestrak, S.J.: Design of residue generators and multi-operand modulo adders using carry save
adders. In: Proceedings of the 10th Symposium on Computer Arithmetic, Grenoble, 26–28
June 1991, pp. 100–107 (1991)
19. Premkumar, A.B.: A formal framework for conversion from binary to residue numbers. IEEE
Trans. Circuits Syst. 49, 135–144 (2002)
20. Premkumar, A.B., Ang, E.L., Lai, E.M.K.: Improved memory-less RNS forward converter
based on periodicity of residues. IEEE Trans. Circuits Syst. 53, 133–137 (2006)
21. Sousa, L., Chaves, R.: A universal architecture for designing efficient modulo 2 n ± 1
multipliers. IEEE Trans. Circuits Syst. 52(6), 1166–1178 (2005)
22. Will, M.A., K.L.K. Ryan, Computing Mod Without Mod. https://eprint.iacr.org/2014/755.pdf
23. Zimmermann, R.: Efficient VLSI implementation of modulo 2 n +1 addition and multiplication.
In:14th IEEE Symposium on Computer Arithmetic, Adelaide, April 14–16, pp. 158–167
(1999)