Table 17.1 Comparative ratio of memory use for ReP and 80 Â 86
No. 80 Â 86 instruction
ReP instructions
Integer average (%
total executed) (%)
Instructions Memory traffic Instructions
Memory traffic
1
Load
2L
LD Ri, Rj
2L/2
22
2
Conditional
branch
1L
XOR Mask,
Rj
1L/2
20
CBR Ri, Rj 1L/2
3
Compare
1L
CND, Ri, Rj 1L/2
16
4
Store
1L, 1S
ST Ri, Rj
(1L + 1S)/2
12
5
Add
1L
ADD Ri, Rj 1L/2
8
6
And
1L
AND Ri, Rj 1L/2
6
7
Sub
1L
SUB Ri, Rj 1L/2
5
8
Move
1L
MV Ri, Rj
1L/2
4
9
Call
1L
MV Ri, Rj
1L/2
1
CBR Ri, Rj 1L/2
10
Return
1L
MV Ri, Rj
1L/2
1
CBR Ri, Rj 1L/2
Total
96
Table 17.3 Comparative ratio of memory use for MIPs and ReP
MIPs instruction
ReP instructions
Integer average (%)
Instruction
Memory traffic
Instruction
Memory traffic
Load
2L
LOAD
2L/2
26
Add
1L
ADD
1L/2
19
Cond branch
1L
Compare
1L/2
12
XOR
1L/2
CBR
1L/2
Store
1L, 1S
STORE
(1L+1S)/2
10
Or
1L
OR
1L/2
9
Compare
1L
Compare
1L/2
5
And
1L
AND
1L/2
4
Sub
1L
SUB
1L/2
3
Xor
1L
XOR
1L/2
3
(continued)
Table 17.2 Comparison of execution time for 80 Â 86 and ReP
Processor and instruction mix
Ratio
80 Â 86 22%* 2L+20%*1L+16*1L +12*2L +8*1L +6*1L +5*1L +4*1L +2*1L
¼1.66
ReP 22%* L+20%*1L+(16*1L +12*2L +8*1L +6*1L +5*1L +4*1L)/2 +2*1L
17.5 Hardware Performance
237