Why we need to have a look on these types? why we need to know instruction
formats at all?
The answer is simple:
Assuming sequential execution of the instructions, one can estimate an overall
performance of hardware for particular tasks and task mix. Each zone has its own
specific features in terms of performance and interaction with other zones.
Thus passive zone includes several sources of memory (Flash, SRAM, DRAM)
that have different control schemes and timing diagrams, and while involved in
instruction execution cause a lot of uncertainties. Interfacing zone might be different
in control protocols, width, performance, and reliability.
Two examples of instruction execution using all three zones are shown in
Fig. 17.13.
Hiy is loaded from external source, saved in passive zone PZ, and retrieved into
AZ to be executed; when results are ready, they are delivered back to IZ e , where
index e stands for external.
Another type of instruction shown describes the load of HIy to AZ, executed in
several iterations (or just one) and saved back in PZ.
Data might be processed by instruction when data come from external source
directly to the active zone and after processing goes directly to PZ, or when data
follow reversed order, from passive zone to active zone for processing and then to
external destination.
Data go directly to passive zone—well-known direct access to memory, or when
data are dread by external source—direct reading from memory.
Finally, there is a group of instructions in modern hardware that is assigned for
reading or writing from or to external source and when data retrieved and processed
in active zone.
Passive zone is not starting any instructions either initiated by external zone or
by active zone.
AZ
IZ
PZ
AZ
IZ
PZ
Hiy
Fig. 17.13 Complex processor instruction from the previous century
232
17 On Performance: From Hardware up to Distributed Systems
formats at all?
The answer is simple:
Assuming sequential execution of the instructions, one can estimate an overall
performance of hardware for particular tasks and task mix. Each zone has its own
specific features in terms of performance and interaction with other zones.
Thus passive zone includes several sources of memory (Flash, SRAM, DRAM)
that have different control schemes and timing diagrams, and while involved in
instruction execution cause a lot of uncertainties. Interfacing zone might be different
in control protocols, width, performance, and reliability.
Two examples of instruction execution using all three zones are shown in
Fig. 17.13.
Hiy is loaded from external source, saved in passive zone PZ, and retrieved into
AZ to be executed; when results are ready, they are delivered back to IZ e , where
index e stands for external.
Another type of instruction shown describes the load of HIy to AZ, executed in
several iterations (or just one) and saved back in PZ.
Data might be processed by instruction when data come from external source
directly to the active zone and after processing goes directly to PZ, or when data
follow reversed order, from passive zone to active zone for processing and then to
external destination.
Data go directly to passive zone—well-known direct access to memory, or when
data are dread by external source—direct reading from memory.
Finally, there is a group of instructions in modern hardware that is assigned for
reading or writing from or to external source and when data retrieved and processed
in active zone.
Passive zone is not starting any instructions either initiated by external zone or
by active zone.
AZ
IZ
PZ
AZ
IZ
PZ
Hiy
Fig. 17.13 Complex processor instruction from the previous century
232
17 On Performance: From Hardware up to Distributed Systems