11 Programming Languages for Safety-Critical Systems . . . . . . . . . . . 165
Eugene Zouev
11.1 Oberon-07 as the Single Development Tool . . . . . . . . . . . . . . 165
11.2 System Software for ERRIC: The Stack
of Development Tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
11.3 Low Level: The Assembly Language . . . . . . . . . . . . . . . . . . . 167
11.4 System Level: The ERRIC Language . . . . . . . . . . . . . . . . . . . 171
11.5 Application Level: The COMPOSITA Language . . . . . . . . . . . 173
11.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174
12 Proposed Runtime System Structure with Support
of Resilient Concurrency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
12.1 Runtime System Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
12.2 Concurrency Support for Resilient Computing . . . . . . . . . . . . 179
12.2.1 Problem of Concurrency . . . . . . . . . . . . . . . . . . . . . 179
12.2.2 Why It Is Needed . . . . . . . . . . . . . . . . . . . . . . . . . . 180
12.2.3 The Matter of Concurrency . . . . . . . . . . . . . . . . . . . 181
12.2.4 Known Solutions and Derived Principles
to Follow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182
12.3 Communication of Sequential Processes: Principles
of Synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183
12.4 Parallelism and Concurrency Versus GLM . . . . . . . . . . . . . . . 186
12.5 Parallelism and Concurrency: Further Models . . . . . . . . . . . . . 188
12.6 Concurrency Handling: Language and Runtime System
Aspects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189
12.7 Concurrency: Further Steps: Fault-Tolerant Interactors . . . . . . 190
12.8 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191
Appendix: The Main Algebraic Books on Process Algebra Are . . . . . . 191
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192
13 Proposed Runtime System Versus Existing Approaches . . . . . . . . . 193
13.1 What Is Available? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 195
14 Hardware: The ERRIC Architecture . . . . . . . . . . . . . . . . . . . . . . . 197
14.1 Processor Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197
14.2 Instruction Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 202
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 205
15 Architecture Comparison and Evaluation . . . . . . . . . . . . . . . . . . . . 207
15.1 Processor Architecture Overview . . . . . . . . . . . . . . . . . . . . . . 208
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
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Contents