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351. Lohmann, D., Hofer, W., Schröder-Preikschat, W., Spinczyk, O.: CiAO: An aspect-oriented
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352. Lohmann, D., Scheler, F., Schröder-Preikschat, W., Spinczyk, O.: PURE Embedded Operating
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354. Lokuciejewski, P., Marwedel, P.: WCET-aware Source Code and Assembly Level Optimization Techniques for Real-Time Systems. Springer (2010)
355. Lokuciejewski, P., Stolpe, M., Morik, K., Marwedel, P.: Automatic selection of machine
learning models for WCET-aware compiler heuristic generation. In: Proceedings of the 4th
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356. López, J.M., Díaz, J.L., García, D.F.: Utilization bounds for EDF scheduling on real-time
multiprocessor systems. Real-Time Syst. 28(1), 39–68 (2004). DOI 10.1023/B:TIME.
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357. Lu, Y.H., Chung, E.Y., Šimunic, T., Benini, L., De Micheli, G.: Quantitative comparison
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360. Macii, A., Benini, L., Poncino, M.: Memory Design Techniques for Low Energy Embedded
Systems. Kluwer Academic Publishers (2002)
361. Macii, E. (ed.): Ultra low-power electronics and design. Springer (2004)
362. Maculan, N., Porto, S.C.S., Ribeiro, C., de Souza, C.C.: A new formulation for scheduling unrelated processors under precedence constraints. Revue Francaise d’Automatique,
d’informatique et de recherche Operationelle (RAIRO) pp. 87–92 (1999)
363. Magnusson, P.S., Christensson, M., Eskilson, J., Forsgren, D., Hallberg, G., Hogberg, J.,
Larsson, F., Moestedt, A., Werner, B.: Simics: A full system simulation platform. Computer
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365. Manwell, J.F., McGowan, J.G.: Lead acid battery storage model for hybrid energy systems.
Solar Energy 50, 399–405 (1993)
366. Marian, N., Ma, Y.: Translation of Simulink models to component-based software models.
8th Int. Workshop on Research and Education in Mechatronics REM, http://citeseerx.ist.psu.
edu/viewdoc/download?doi=10.1.1.86.1490&rep=rep1&type=pdf pp. 262–267 (2007)
367. Marongiu, A., Benini, L.: Efficient OpenMP support and extensions for MPSoCs with explicitly managed memory hierarchy. Proceedings of Design, Automation and Test in Europe
(DATE) pp. 809–814 (2009)
368. Martello, S., Toth, P.: Knapsack Problems – Algorithms and Computer Implementations,
chapter 6. John Wiley & Sons, http://www.or.deis.unibo.it/kp/Chapter6.pdf (1990)
369. Martin, G., Müller, W. (eds.): UML ™ for SOC Design. Springer (2010)
370. Martin, S.M., Flautner, K., Mudge, T., Blaauw, D.: Combined dynamic voltage scaling and
adaptive body biasing for lower power microprocessors under dynamic workloads. ICCAD
’02: Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
pp. 721–725 (2002). DOI http://doi.acm.org/10.1145/774572.774678
Literaturverzeichnis
350. Liu, Y., Zhang, W.: Scratchpad Memory Architectures and Allocation Algorithms for Hard
Real-Time Multicore Processors. Journal of Computing Science and Engineering (2015)
351. Lohmann, D., Hofer, W., Schröder-Preikschat, W., Spinczyk, O.: CiAO: An aspect-oriented
operating-system family for resource-constrained embedded systems. In: USENIX Annual
Technical Conference (2009)
352. Lohmann, D., Scheler, F., Schröder-Preikschat, W., Spinczyk, O.: PURE Embedded Operating
Systems – CiAO. Proc. International Workshop on Operating System Platforms for Embedded
Real-Time Applications, (OSPERT) (2006)
353. Lohmann, D., Streicher, J., Hofer, W., Spinczyk, O., Schröder-Preikschat, W.: Configurable
memory protection by aspects. In: Proceedings of the 4th Workshop on Programming
Languages and Operating Systems (PLOS ’07). ACM Press, New York, NY, USA (2007)
354. Lokuciejewski, P., Marwedel, P.: WCET-aware Source Code and Assembly Level Optimization Techniques for Real-Time Systems. Springer (2010)
355. Lokuciejewski, P., Stolpe, M., Morik, K., Marwedel, P.: Automatic selection of machine
learning models for WCET-aware compiler heuristic generation. In: Proceedings of the 4th
Workshop on Statistical and Machine Learning Approaches to ARchitecture and compilaTion
(SMART) (2010). URL http://ctuning.org/dissemination/smart10-01.pdf
356. López, J.M., Díaz, J.L., García, D.F.: Utilization bounds for EDF scheduling on real-time
multiprocessor systems. Real-Time Syst. 28(1), 39–68 (2004). DOI 10.1023/B:TIME.
0000033378.56741.14. URL http://dx.doi.org/10.1023/B:TIME.0000033378.56741.14
357. Lu, Y.H., Chung, E.Y., Šimunic, T., Benini, L., De Micheli, G.: Quantitative comparison
of power management algorithms. Proceedings of Design, Automation and Test in Europe
(DATE) pp. 20–26 (2000)
358. Luican, I.I., Zhu, H., Balasa, F.: Formal Model of Data Reuse Analysis for Hierarchical
Memory Organizations. In: Proceedings of the International Conference on Computer-Aided
Design (ICCAD), pp. 595–600. ACM, New York, NY, USA (2006). DOI 10.1145/1233501.
1233623
359. Machanik, P.: Approaches to addressing the memory wall. Technical Report, November,
Univ. Brisbane (2002)
360. Macii, A., Benini, L., Poncino, M.: Memory Design Techniques for Low Energy Embedded
Systems. Kluwer Academic Publishers (2002)
361. Macii, E. (ed.): Ultra low-power electronics and design. Springer (2004)
362. Maculan, N., Porto, S.C.S., Ribeiro, C., de Souza, C.C.: A new formulation for scheduling unrelated processors under precedence constraints. Revue Francaise d’Automatique,
d’informatique et de recherche Operationelle (RAIRO) pp. 87–92 (1999)
363. Magnusson, P.S., Christensson, M., Eskilson, J., Forsgren, D., Hallberg, G., Hogberg, J.,
Larsson, F., Moestedt, A., Werner, B.: Simics: A full system simulation platform. Computer
35(2), 50–58 (2002). DOI 10.1109/2.982916
364. Man, H.D.: From the heaven of software to the hell of nanoscale physics: an industry in
transition. Keynote, HiPEAC ACACES Summer School, L’Aquila (2007)
365. Manwell, J.F., McGowan, J.G.: Lead acid battery storage model for hybrid energy systems.
Solar Energy 50, 399–405 (1993)
366. Marian, N., Ma, Y.: Translation of Simulink models to component-based software models.
8th Int. Workshop on Research and Education in Mechatronics REM, http://citeseerx.ist.psu.
edu/viewdoc/download?doi=10.1.1.86.1490&rep=rep1&type=pdf pp. 262–267 (2007)
367. Marongiu, A., Benini, L.: Efficient OpenMP support and extensions for MPSoCs with explicitly managed memory hierarchy. Proceedings of Design, Automation and Test in Europe
(DATE) pp. 809–814 (2009)
368. Martello, S., Toth, P.: Knapsack Problems – Algorithms and Computer Implementations,
chapter 6. John Wiley & Sons, http://www.or.deis.unibo.it/kp/Chapter6.pdf (1990)
369. Martin, G., Müller, W. (eds.): UML ™ for SOC Design. Springer (2010)
370. Martin, S.M., Flautner, K., Mudge, T., Blaauw, D.: Combined dynamic voltage scaling and
adaptive body biasing for lower power microprocessors under dynamic workloads. ICCAD
’02: Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
pp. 721–725 (2002). DOI http://doi.acm.org/10.1145/774572.774678
