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303. Koopman, P.J., Upender, B.P.: Time division multiple access without a bus master. United
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306. Korf, R.E.: A new algorithm for optimal bin packing. American Association for Artificial
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IEEE Design & Test pp. 18–27 (2002)
314. Krüger, G.: Automatic generation of self-test programs: A new feature of the MIMOLA design
system. Proceedings of the Design Automation Conference (DAC) pp. 378–384 (1986)
315. Kuang, S.R., Chen, C.Y., Liao, R.Z.: Partitioning and pipelined scheduling of embedded
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317. Kumar, R., Farkas, K.I., Jouppi, N.P., Ranganathan, P., Tullsen, D.M.: Single-ISA heterogeneous multi-core architectures: The potential for processor power reduction. In:
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319. Lala, P.: Fault Tolerant and Fault Testable Hardware Design. Prentice Hall (1985)
320. Lam, K.Y., Kuo, T.W. (eds.): Real-Time Database Systems: Architecture and Techniques.
Kluwer Academic Publishers, Norwell, MA, USA (2001)
321. Lam, M.S., Rothberg, E.E., Wolf, M.E.: The cache performance and optimizations of blocked
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Literaturverzeichnis
300. Kobryn, C.: UML 2001: A standardization Odyssey. Communications of the ACM (CACM),
available at http://www.omg.org/attachments/pdf/UML_2001_CACM_Oct99_p29-Kobryn.
pdf pp. 29–36 (2001)
301. Kocher, P., Lee, R., McGraw, G., Raghunathan, A.: Security as a new dimension in embedded
system design. In: Proceedings of the 41st Annual Design Automation Conference, DAC
’04, pp. 753–760. ACM, New York, NY, USA (2004). DOI 10.1145/996566.996771. URL
http://doi.acm.org/10.1145/996566.996771. Moderator-Ravi, Srivaths
302. Kohavi, Z., Jha, N.K.: Switching and Finite Automata Theory, 3 edn. Cambridge University
Press (2010)
303. Koopman, P.J., Upender, B.P.: Time division multiple access without a bus master. United
Technologies Research Center, UTRC Technical Report RR-9500470, http://www.ece.cmu.
edu/~koopman/jtdma/jtdma.html (1995)
304. Kopetz, H.: Real-Time Systems – Design Principles for Distributed Embedded Applications –.
Springer (2011)
305. Kopetz, H., Grunsteidl, G.: TTP – a protocol for fault-tolerant real-time systems. IEEE
Computer 27, 14–23 (1994)
306. Korf, R.E.: A new algorithm for optimal bin packing. American Association for Artificial
Intelligence Proceedings, www.aaai.org pp. 731–736 (2002)
307. Korte, B., Vygen, J.: Kombinatorische Optimierung, Kapitel 18. Springer (2012)
308. Kotthaus, H.: Methods for efficient resource utilization in statistical machine learning algorithms. Ph.D. thesis, TU Dortmund University, Dortmund (2018). URL http://dx.doi.org/10.
17877/DE290R-18928
309. Kranitis, N., Paschalis, A., Gizopoulos, D., Zorian, Y.: Instruction-based self-testing of processor cores. Journal of Electronic Testing 19, 103–112 (2003)
310. Krhovjak, J., Matyas, V.: Secure hardware – pv018. http://www.fi.muni.cz/~xkrhovj/lectures/
2006_PV018_Secure_Hardware_slides.pdf (2006)
311. Krishna, C., Shin, K.G.: Real-Time Systems. McGraw-Hill, Computer Science Series (1997)
312. Krstić, A., Cheng, K.: Delay fault testing of VLSI circuits. Kluwer Academic Publishers
(1998)
313. Krstić, A., Dey, S.: Embedded software-based self-test for programmable core-based designs.
IEEE Design & Test pp. 18–27 (2002)
314. Krüger, G.: Automatic generation of self-test programs: A new feature of the MIMOLA design
system. Proceedings of the Design Automation Conference (DAC) pp. 378–384 (1986)
315. Kuang, S.R., Chen, C.Y., Liao, R.Z.: Partitioning and pipelined scheduling of embedded
system using integer linear programming. In: 11th International Conference on Parallel and
Distributed Systems (ICPADS’05), vol. 2, pp. 37–41 (2005). DOI 10.1109/ICPADS.2005.219
316. Kühn, R.: Analyse und Evaluation von Gütekriterien für approximative Source-to-Source
Transformationen. Bachelorarbeit, Fakultät für Informatik, TU Dortmund (2016)
317. Kumar, R., Farkas, K.I., Jouppi, N.P., Ranganathan, P., Tullsen, D.M.: Single-ISA heterogeneous multi-core architectures: The potential for processor power reduction. In:
Proceedings of the 36th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 36, pp. 81–. IEEE Computer Society, Washington, DC, USA (2003). URL
http://dl.acm.org/citation.cfm?id=956417.956569
318. Labrosse, J.: Embedded Systems Building Blocks - Complete and Ready-to-use Modules in
C. Elsevier (2000)
319. Lala, P.: Fault Tolerant and Fault Testable Hardware Design. Prentice Hall (1985)
320. Lam, K.Y., Kuo, T.W. (eds.): Real-Time Database Systems: Architecture and Techniques.
Kluwer Academic Publishers, Norwell, MA, USA (2001)
321. Lam, M.S., Rothberg, E.E., Wolf, M.E.: The cache performance and optimizations of blocked
algorithms. Architectural Support for Programming Languages and Operating Systems (ASPLOS) pp. 63–74 (1991)
322. Lang, F.: Analog-Digital-Umsetzer für die hochbitratige Datenübertragung. Ph.D. thesis,
Fakultät Informatik, Elektrotechnik und Informationstechnik der Universität Stuttgart (2014)
323. Laplante, P.: Real-Time Systems: Design and Analysis - An Engineer’s Handbook. IEEE
Press (1997)
