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Literaturverzeichnis
105. Clouard, A., Jain, K., Ghenassia, F., Maillet-Contoz, L., Strassen, J.: Using transactional
models in SoC design flow. In: [408] pp. 29–64 (2003)
106. Coelho, D.R.: The VHDL handbook. Kluwer Academic Publishers (1989)
107. Coello, C.A.C., Lamont, G.B., Veldhuizen, D.A.v.: Evolutionary Algorithms for Solving
Multi-Objective Problems. Springer (2007)
108. Collins-Sussman, B., Fitzpatrick, B., Pilato, C.: Version control with subversion – for subversion 1.5. http://svnbook.red-bean.com/en/1.5/svn-book.pdf (2008)
109. Cooling, J.: Software Engineering for Real-Time Systems. Addison Wesley (2003)
110. Cordes, D.A.: Automatic parallelization for embedded multi-core systems using high-level
cost models. Ph.D. thesis, TU Dortmund, Department of Computer Science (2013)
111. Cortadella, J., Kondratyev, A., Lavagno, L., Massot, M., Moral, S., Passerone, C., Watanabe,
Y., Sangiovanni-Vincentelli, A.: Task generation and compile-time scheduling for mixed datacontrol embedded software. Proceedings of the Design Automation Conference (DAC) pp.
489–494 (2000)
112. Coskun, A.K., Rosing, T.S., Whisnant, K.A., Gross, K.C.: Temperature-aware MPSoC scheduling for reducing hot spots and gradients. In: Proceedings of the 2008 Asia and South Pacific
Design Automation Conference, ASP-DAC ’08, pp. 49–54. IEEE Computer Society Press,
Los Alamitos, CA, USA (2008). URL http://dl.acm.org/citation.cfm?id=1356802.1356815
113. Coussy, P., Morawiec, A.: High-Level Synthesis – From Algorithm to Digital Circuit. Springer
(2008)
114. Craig, I.D.: Virtual Machines. Springer (2006)
115. Cyber-Physical Systems Virtual Organization: Home page. https://cps-vo.org/ (1920)
116. Cyber-Physical Systems Virtual Organization: Cyber-physical systems (CPS) – program solicitation. https://cps-vo.org/node/59030 (2019)
117. D. L. Oliveira L. A. Faria, H.A.D., Garcia, K.: An architecture for globally-synchronous
locally-asynchronous systems on FPGAs. IEEE XXIII International Congress on Electronics,
Electrical Engineering and Computing (INTERCON) pp. 1–6 (2016)
118. Damm, W., Harel, D.: LSCs: Breathing life into message sequence charts. Formal Methods
in System Design (2001)
119. Dasgupta, S.: The organization of microprogram stores. ACM Computing Surveys, Vol. 11
pp. 39–65 (1979)
120. Davis, J., Hylands, C., Janneck, J., Lee, E.A., Liu, J., Liu, X., Neuendorffer, S., Sachs, S.,
Stewart, M., Vissers, K., Whitaker, P., Xiong, Y.: Overview of the Ptolemy project. Technical
Memorandum UCB/ERL M01/11; http://ptolemy.eecs.berkeley.edu (2001)
121. Davis, R.I., Burns, A.: A survey of hard real-time scheduling for multiprocessor systems.
ACM Comput. Surv. 43(4), 35:1–35:44 (2011). DOI 10.1145/1978802.1978814. URL
http://doi.acm.org/10.1145/1978802.1978814
122. De Greef, E., Catthoor, F., Man, H.: Memory size reduction through storage order optimization
for embedded parallel multimedia applications. Proc. Workshop on Parallel Processing and
Multimedia pp. 84–98 (1997)
123. De Greef, E., Catthoor, F., Man, H.D.: Array placement for storage size reduction in embedded
multimedia systems. IEEE Int. Conf. on Application-Specific Systems, Architectures and
Processors (ASAP) pp. 66–75 (1997)
124. De Micheli, G., Ernst, R., Wolf, W.: Readings in Hardware/Software Co-Design. Academic
Press (2002)
125. Derin, O.: Self-adaptivity of applications on network on chip multiprocessors – the case of
fault-tolerant Kahn Process Networks. Ph.D. thesis, Università della Svizzera Italiana de
Lugano (2013)
126. Derler, P., Lee, E.A., Vincentelli, A.S.: Modeling cyber-physical systems. Proceedings of the
IEEE 100(1), 13–28 (2012). DOI 10.1109/JPROC.2011.2160929
127. Deutsches Institut für Normung: DIN 66253, Programmiersprache PEARL, Teil 2 PEARL
90. Beuth-Verlag; http://www.din.de (1997)
128. Devi, U.M.C., Anderson, J.H.: Tardiness bounds under global EDF scheduling on a multiprocessor. In: Proceedings of the Real-Time Systems Symposium (RTSS), pp. 12 pp.–341
(2005). DOI 10.1109/RTSS.2005.39