80
Network-on-Chip
where:
Total packets completed refers to the number of packets that successfully
arrive at their destination IP cores
Packet length is measured in terms of flits
Number of IP blocks refers to the number of IP blocks involved in the
communication
Total time denotes the simulation time (in clock cycles)
Hence, throughput is represented as flits/cycle/IP. Network bandwidth (BW)
refers to the maximum number of bits that can be sent successfully to the destination through the network per unit time. It is represented as bits/sec (bps).
Throughput × Number of IP cores × Flit size
BW =
(4.2)
Clock period
Depending on the source–destination pair and the routing algorithm, each
packet may have a different latency. There is also some overhead in the
source and destination that contributes to the overall latency. Therefore, for
any packet i, the overall latency (L i ) is defined as
L i = Sender overhead + Transport latency + Receiver overhead (4.3)
Let P be the total number of packets reaching their destination IPs. The average overall latency, L avg , is then calculated as (Pande et al. 2005)
∑
P
i
i =1
L avg =
(4.4)
P
4.1.2 Cost Metrics
Energy consumption by the network is one of the most important cost metrics
in NoC design. Energy consumption of each router is determined by using
Synopsys Prime Power in 90-nm CMOS technology with Faraday library by
running their gate-level netlists. The clock frequency to each router is been
fixed at 1.5 GHz. The number of toggles of every individual I/O pin of the
router and their probability of remaining in logic 1 state for the entire simulation window is calculated from the NoC simulator. This information is
then fed to Synopsys Prime Power tool to estimate the power of each router
with the following parameters: process = normal, supply voltage = 1 V, and
temperature = 75°C.
Energy consumption of the links is determined separately from that of
the routers. Links can be modeled as semiglobal interconnects. Copper wire
(resistivity  = 17  nΩ·m) is chosen as interconnection link. The width and
thickness of the wires are taken to be 0.25 and 0.5 µm, respectively. The spacing between two adjacent wires is kept at 0.25 µm. The spacing between two
adjacent metal layers is fixed at 0.75 µm and is filled by a dielectric material