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Architecture Design of Network-on-Chip
throughout the experiments. Another interesting fact is that DyAD–OE does
keep the advantage of deterministic routing when the network is not congested. However, the average latency a packet experiences in odd–even is 14%
higher compared to that in DyAD–OE, when the network is lightly loaded.
Other nonuniform traffic patterns (such as transpose2 and hot spot) have been
simulated as well and the results were similar to those under the transpose1
traffic pattern. Simulation has been carried out for different network sizes
(ranging from 4  × 4 to 8  × 8 tiles) and different FIFO sizes (ranging from
three to eight flits) and also with realistic traffic such as multimedia traffic.
All the results reflect the same characteristic (Hu and Marculescu 2004b).
3.8 Summary
In this chapter, the architecture design of wormhole and VC for NoC has
been described. The implementation of GALS style of communication with
dual-clock FIFO has also been discussed in detail. The evaluation of performance and cost of NoC by applying self-similar traffic with varying locality
factors will be discussed in Chapter 4. The simulation results are compared
with a well-known tree-based topology, butterfly fat-tree (BFT), and two
variants of mesh topology connecting single/two cores to each router under
the same bisection width constraint.
References
Cheng, Y. 2004. Gray code sequences. U.S. Patent 6703950, March 9, 2004.
Cummings, C. E. 2002. Simulation and synthesis techniques for asynchronous FIFO
design. Synopsys User Group, San Jose, CA, http://www.sunburst-design.com/
papers/CummingsSNUG2002J_FIFO1.pdf.
Cummings, C. E. and Alfke, P. 2002. Simulation and synthesis techniques for asynchronous FIFO design with asynchronous pointer comparisons. Synopsys
User Group, San Jose, CA, http://www.sunburst-design.com/papers/
CummingsSNUG2002J_FIFO2.pdf.
Dally, W. J. 1992. Virtual-channel flow control. IEEE Transactions on Parallel and
Distributed Systems, vol. 3, no. 2, pp. 194–205.
Hu, J. and Marculescu, R. 2004a. DyAD-smart routing for networks-on-chip.
Proceedings of Design and Automation Conference, pp. 260–263, July 7–11,
San Diego, CA.
Hu, J. and Marculescu, R. 2004b. Smart routing for networks-on-chip. Technical report,
ECE Department, Carnegie Mellon University, http://www.ece.cmu.edu/_sld/pubs.
Accessed at September 2007.