6.4 System-Level Power Reduction....................................................... 172
6.4.1 Dynamic Voltage Scaling.................................................... 172
6.4.1.1 History-Based DVS............................................... 174
6.4.1.2 Hardware Implementation ................................. 178
6.4.1.3 Results and Discussions...................................... 179
6.4.2 Dynamic Frequency Scaling .............................................. 179
6.4.2.1 History-Based DFS ............................................... 181
6.4.2.2 DFS Algorithm...................................................... 183
6.4.2.3 Link Controller ..................................................... 183
6.4.2.4 Results and Discussions...................................... 184
6.4.3 VFI Partitioning ................................................................... 185
6.4.4 Runtime Power Gating........................................................ 186
6.5 Summary............................................................................................ 188
References ..................................................................................................... 188
7. Signal Integrity and Reliability of Network-on-Chip........................ 191
7.1 Introduction ....................................................................................... 191
7.2 Sources of Faults in NoC Fabric ...................................................... 193
7.2.1 Permanent Faults ................................................................. 194
7.2.2 Faults due to Aging Effects................................................. 194
7.2.2.1 Negative-Bias Temperature Instability ............. 194
7.2.2.2 Hot Carrier Injection............................................ 195
7.2.3 Transient Faults .................................................................... 195
7.2.3.1 Capacitive Crosstalk ............................................ 195
7.2.3.2 Soft Errors.............................................................. 199
7.2.3.3 Some Other Sources of Transient Faults ........... 203
7.3 Permanent Fault Controlling Techniques...................................... 204
7.4 Transient Fault Controlling Techniques ........................................ 205
7.4.1 Intra-Router Error Control.................................................. 205
7.4.1.1 Soft Error Correction ........................................... 206
7.4.2 Inter-Router Link Error Control ........................................ 210
7.4.2.1 Capacitive Crosstalk Avoidance Techniques ......210
7.4.2.2 Error Detection and Retransmission................. 216
7.4.2.3 Error Correction ................................................... 220
7.5 Unified Coding Framework............................................................. 221
7.5.1 Joint CAC and LPC Scheme (CAC + LPC) .......................222
7.5.2 Joint LPC and ECC Scheme (LPC + ECC) ........................223
7.5.3 Joint CAC and ECC Scheme (CAC + ECC)....................... 224
7.5.4 Joint CAC, LPC, and ECC Scheme
(CAC + LPC + ECC) .......................................................... 227
7.6 Energy and Reliability Trade-Off in Coding Technique............. 227
7.7 Summary............................................................................................ 230
References ..................................................................................................... 231
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Contents