251
Testing of Network-on-Chip Architectures
The constraints formulated are as follows:
1. Each core in the system must be assigned to one and only one input/
output pair in the system.
⎧1, if core i is assigned to pair x
⎪
I ix = ⎨
(8.1)
⎪ 0, otherwise
⎩
Np
∑ I ix = 1, ∀i
(8.2)
x=1
2. Each core must be assigned a clock rate.
⎧1, if clock c is assigned to core i
⎪
F ic = ⎨
(8.3)
⎪ 0, otherwise
⎩
∑ F ic = 1, ∀i
(8.4)
c
The test time of core i on input/output port x is given by
∑ T ixc ⋅ F ic.
c
3. Two cores cannot be tested in parallel if they share some common
resources. Two cores i and j assigned to input/output pairs x and
y can be tested in parallel if and only if either of the following two
conditions is valid:
S ix ≥ S jy + ∑ T jyc ⋅ F jc
c
or
S jy ≥ S ix + ∑ T ixc ’ ⋅ F ic ’
c ’
Let the binary variable Z ixjy represent the conflict of cores i and j assigned to
input/output ports x and y, respectively. Test between two cores conflict if
they need some common NoC resource (e.g., router, link). Z ixjy = 1 if the tests
conflict; it is 0 otherwise. To prevent the conflicting cores getting scheduled
simultaneously, either of the following two conditions needs to be valid:
⎛
∑
⎞
Z ixjy ⎜
⎜
S ix − S jy −
T jyc ⋅ F jc ⎟
⎟
≥ 0
(8.5)
⎝
c
⎠