Core
4 FF
6 FF
8 FF
Wrapper chain 1
Wrapper chain 1
Wrapper chain 2
Wrapper chain 2
Wrapper chain 2
Wrapper chain 1
Core
4 FF
6 FF
8 FF
Wrapper chain 1
Wrapper chain 2
(a)
(b)
248
Network-on-Chip
Figure 8.7
Two wrappers: (a) balanced; (b) unbalanced. FF, flip-flop.
at any point of time, the next scan chain gets attached to wrapper chain in
which it fits the best. If no such wrapper chain is available, the internal scan
chain is attached to the current shortest wrapper scan chain. The process is
repeated for the functional input and outputs. The procedure Design_wrapper
(Iyengar and Chakrabarty 2002) is noted as follows:
Procedure Design_wrapper
Input: Number of functional inputs (n)
Number of functional outputs (m)
Scan chain lengths l 1 , l 2 , …, l sc
Output: Wrapper scan chains
Begin
Step 1: Sort the internal scan chains in descending order of length
Step 2: For each internal scan chain l picked up in order do
Step 2.1: Find wrapper scan chain S max with current maximum length
Step 2.2: Find wrapper scan chain S min with current minimum length
Step 2.3: Assign l to the wrapper scan chain S, such that,
(length(S max ) – length(S) + length(l)) is minimum
Step 2.4: If there is no such S, assign l to S min
Step 3: Repeat Step 2 for the functional inputs
Step 4: Repeat Step 2 for functional outputs
End
For example, suppose Core A has 8 functional inputs a[0:7], 11 functional
outputs z[0:10], 9 internal scan chains of lengths 12, 12, 8, 8, 8, 6, 6, 6,
6 flip-flops, and a scan enable control sc. Assume the flit size to be 4.
Hence, in a single clock, 4 bits of data can reach the core from the NoC
channel. The scan elements in the core are partitioned among four wrapper scan chains using the algorithm, as shown in Table 8.2. This partition
yields a longest scan-in chain of length 20 and a longest scan-out chain
of length 21, both of which are optimal values for a 4-bit NoC channel width. The worst-case complexity of the Design_wrapper algorithm is
O(sc log sc + sc·k).