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Low-Power Techniques for Network-on-Chip
6.4.1.3 Results and Discussions
It has been observed in simulation that history-based DVS increases zeroload latency by 10.8% and average latency before congestion by 15.2%, while
decreasing throughput by less than 2.5%. This moderate impact on performance is accompanied by a large power saving of up to 6.3 × (4.6 × average).
When the network is saturated, flits are stalled for a long time in input buffers. Such congested routers show high input buffer utilization and low
communication link utilization. In such a scenario, the history-based DVS
policy will try to dynamically reduce the frequencies of affected links to
decrease power consumption. It can be observed that the power consumption of the network increases initially as network throughput increases
and dips thereafter as network throughput decreases. This interesting phenomenon is largely due to the very bursty nature of communication workload that results in routers in different parts of the network experiencing
widely varying loads over time. When some of the routers are congested,
traffic through other routers may still be relatively light. Therefore, as the
packet injection rate increases, the overall network throughput may still
increase. Link utilization is strongly correlated with network throughput.
A higher throughput implies higher average link utilization in the network.
The history-based DVS policy only decreases the frequencies and voltages
of links that are lightly utilized—those connected to the congested routers.
It increases the frequencies and voltages of the heavily used links to meet
performance requirements. Hence, only when the entire network becomes
highly congested, the overall network throughput starts to decrease, which
cause an overall reduction in network power.
By dynamically adjusting the DVS policy to maximize power savings when
the network is lightly loaded and minimizing the impact on performance
when the network is congested, the policy is able to realize substantial power
savings without a significant impact on performance. It should be noted that
part of the impact on performance is due to the assumptions for DVS links.
First, the link is down during frequency scaling. Second, when increasing
voltage and frequency, the voltage increases first, which takes a long time.
The frequency is kept at the original low level during voltage transition.
6.4.2 Dynamic Frequency Scaling
As discussed in Section 6.4.1, DVS requires hundreds of clock cycles during transition between voltage levels and additional hardware overhead for
each link. The other way to manage power consumption is DFS. DFS only
adapts the system clock frequency by setting all links in the network to the
same voltage, but it does not always reduce the total energy consumption.
For instance, the power consumed by a network can be reduced by reducing
the operating clock frequency, but it takes long time to forward the same
amount of data and the total energy consumed will be similar. DFS is valid
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