118
Network-on-Chip
Wentzlaff, D., Griffin, P., Hoffmann, H., Bao, L., Edwards, B., Ramey, C., Mattina, M.,
Miao, C. C., Brown, J. F., and Agarwal, A. 2007. On-chip interconnection architecture of the TILE processor. IEEE Micro, vol. 27, no. 5, pp. 15–31.
Zeferino, C. A. and Susin, A. A. 2003. SoCIN: A parametric and scalable network-onchip. Proceedings of IEEE Symposium on Integrated Circuits and Systems Design,
pp. 169–175, September 8–11, São Paulo, Brazil.
Zhang, Y. P., Jeong, T., Chen, F., and Wu, H. 2006. A study of the on-chip interconnection network for the IBM Cyclops64 multi-core architecture. Proceedings of IEEE
International Parallel and Distributed Symposium, April 25–29, Rhodes Island.
Network-on-Chip
Wentzlaff, D., Griffin, P., Hoffmann, H., Bao, L., Edwards, B., Ramey, C., Mattina, M.,
Miao, C. C., Brown, J. F., and Agarwal, A. 2007. On-chip interconnection architecture of the TILE processor. IEEE Micro, vol. 27, no. 5, pp. 15–31.
Zeferino, C. A. and Susin, A. A. 2003. SoCIN: A parametric and scalable network-onchip. Proceedings of IEEE Symposium on Integrated Circuits and Systems Design,
pp. 169–175, September 8–11, São Paulo, Brazil.
Zhang, Y. P., Jeong, T., Chen, F., and Wu, H. 2006. A study of the on-chip interconnection network for the IBM Cyclops64 multi-core architecture. Proceedings of IEEE
International Parallel and Distributed Symposium, April 25–29, Rhodes Island.