1200
Average overall latency
(number of clock cycles)
1000
800
600
400
200
0 0.002 0.004 0.006 0.008 0.010 0.012 0.014 0.016 0.018
Offered load (packets/cycle/IP)
WH
VC
0 . 0 0 2
0 . 0 0 4
0 . 0 0 6
0 . 0 0 8
0 . 0 1 0
0 . 0 1 2
0 . 0 1 4
0 . 0 1 6
0 . 0 1 8
0 . 0 2 0
0 . 0 2 2
0 . 0 2 4
0 . 0 2 6
0 . 0 2 8
0 . 0 3 0
300
Energy consumption ( μJ)
250
200
150
100
50
B ef o r e s a t u r a t i o n
Af t e r s a t u r a t i o n
Network
Router
L i n k
0
Offered load (packets/cycle/IP)
107
Evaluation of Network-on-Chip Architectures
Figure 4.32
Latency comparison of WH- and VC-based MoT networks under localized offered load (locality factor = 0.8).
Figure 4.33
Network energy consumption in MoT network after clock gating in VC routers.
Link
35%
FIFO
28%
Other
logic
37%
Figure 4.34
Component-wise energy consumption after clock gating in all the VC routers. Other logic
includes routing logic, arbitration, and control logic.