9.6.2
PSO for Flexible Router Placement................................ 281
9.6.2.1
Particle Structure and Fitness Function ..... 282
9.6.2.2
Local and Global Bests .................................. 282
9.6.2.3
Evolution of Generation ................................ 283
9.6.2.4
Swap Operator................................................ 283
9.6.2.5
Swap Sequence ............................................... 283
9.7 Summary............................................................................................284
References .....................................................................................................284
10. Reconfigurable Network-on-Chip Design ............................................ 289
10.1 Introduction ..................................................................................... 289
10.2 Literature Review............................................................................ 290
10.3 Local Reconfiguration Approach.................................................. 291
10.3.1 Routers............................................................................... 292
10.3.2 Multiplexers ...................................................................... 293
10.3.3 Selection Logic.................................................................. 294
10.3.4 Area Overhead ................................................................. 294
10.3.5 Design Flow ...................................................................... 296
10.3.5.1 Construction of CCG ..................................... 298
10.3.5.2 Mapping of CCG ............................................ 299
10.3.5.3 Configuration Generation............................. 299
10.3.6 ILP-Based Approach........................................................ 299
10.3.6.1 Parameters and Variables .............................300
10.3.6.2 Objective Function.........................................300
10.3.6.3 Constraints......................................................300
10.3.7 PSO Formulation.............................................................. 301
10.3.7.1 Particle Formulation and Fitness Function ... 302
10.3.8 Iterative Reconfiguration ................................................ 303
10.4 Topology Reconfiguration .............................................................304
10.4.1 Modification around Routers .........................................305
10.4.2 Reconfiguration Architecture ........................................306
10.4.2.1 Application Mapping .................................... 307
10.4.2.2 Core-to-Network Mapping...........................309
10.4.2.3 Topology and Route Generation.................. 310
10.5 Link Reconfiguration...................................................................... 311
10.5.1 Estimating Channel Bandwidth Utilization ................ 311
10.6 Summary.......................................................................................... 312
References ..................................................................................................... 314
11. Three-Dimensional Integration of Network-on-Chip........................ 317
11.1
Introduction ..................................................................................... 317
11.2
3D Integration: Pros and Cons ...................................................... 318
11.2.1 Opportunities of 3D Integration.................................... 319
11.2.2 Challenges of 3D Integration ......................................... 321
x
Contents
PSO for Flexible Router Placement................................ 281
9.6.2.1
Particle Structure and Fitness Function ..... 282
9.6.2.2
Local and Global Bests .................................. 282
9.6.2.3
Evolution of Generation ................................ 283
9.6.2.4
Swap Operator................................................ 283
9.6.2.5
Swap Sequence ............................................... 283
9.7 Summary............................................................................................284
References .....................................................................................................284
10. Reconfigurable Network-on-Chip Design ............................................ 289
10.1 Introduction ..................................................................................... 289
10.2 Literature Review............................................................................ 290
10.3 Local Reconfiguration Approach.................................................. 291
10.3.1 Routers............................................................................... 292
10.3.2 Multiplexers ...................................................................... 293
10.3.3 Selection Logic.................................................................. 294
10.3.4 Area Overhead ................................................................. 294
10.3.5 Design Flow ...................................................................... 296
10.3.5.1 Construction of CCG ..................................... 298
10.3.5.2 Mapping of CCG ............................................ 299
10.3.5.3 Configuration Generation............................. 299
10.3.6 ILP-Based Approach........................................................ 299
10.3.6.1 Parameters and Variables .............................300
10.3.6.2 Objective Function.........................................300
10.3.6.3 Constraints......................................................300
10.3.7 PSO Formulation.............................................................. 301
10.3.7.1 Particle Formulation and Fitness Function ... 302
10.3.8 Iterative Reconfiguration ................................................ 303
10.4 Topology Reconfiguration .............................................................304
10.4.1 Modification around Routers .........................................305
10.4.2 Reconfiguration Architecture ........................................306
10.4.2.1 Application Mapping .................................... 307
10.4.2.2 Core-to-Network Mapping...........................309
10.4.2.3 Topology and Route Generation.................. 310
10.5 Link Reconfiguration...................................................................... 311
10.5.1 Estimating Channel Bandwidth Utilization ................ 311
10.6 Summary.......................................................................................... 312
References ..................................................................................................... 314
11. Three-Dimensional Integration of Network-on-Chip........................ 317
11.1
Introduction ..................................................................................... 317
11.2
3D Integration: Pros and Cons ...................................................... 318
11.2.1 Opportunities of 3D Integration.................................... 319
11.2.2 Challenges of 3D Integration ......................................... 321
x
Contents
