436
Compact Models for Integrated Circuit Design
12.2.5 Model Validation
After the generation of the model library, a number of simulation experiments are performed to verify the accuracy and predictability of the model
prior to release to production for circuit CAD. Different model cards (e.g.,
logic and SRAM) have different requirements for model validation and
there are several ways to check the robustness of the extracted model.
In general, the model validation includes (1) verification of the simulated
device performance matrix such I on , I off , V th , and ring-oscillator speed to the
target specifications; (2) scalability of device performance; and (3) compatibility with external circuit simulation tools to ensure convergence of circuit
simulation.
12.3 Model Usage
The usage of the model cards or library is described in the example model
library. The model card similar to ex1mod0p1.l can be used for corner simulation using systematic ±3σ extreme corners (SS, FF) and (FS, SF) intermediate corners defined in Table 12.2 as well as MC statistical analysis. In order
to select appropriate simulation setup (e.g., corners or MC), the appropriate input command must be used to select the flags in HSPICE netlist. The
appropriate switches (flags) to turn on or off the target method of simulation
using ex1mod0p1.l are shown in Table 12.4.
Thus, for circuit analysis using the model card in ex1mod0p1.l, the following commands are used in HSPICE circuit input file or netlist.
TABLE 12.4
Assignment of Different Flags in the HSPICE Netlist to Set up Circuit Analysis
Using the Compact Model in Example1
Variation
Corner
mismatchflag
sigmavtflag
globalmcflag
global
[n/p] -
mean
global [n/p]
meansigma
global
[n/p]sigma
Systematic
Fixed
corners
0
0
0
*
*
*
Total variation Fixed
corners
0
1
0
*
*
*
Total variation MC
1
0
1
Systematic
mean
Die-to-die
spread
Within die
spread
Variation
around mean
MC
1
0
1
Systematic
mean
0
Within die
spread
Variation
around a
corner
MC
1
0
0
*
*
*
Compact Models for Integrated Circuit Design
12.2.5 Model Validation
After the generation of the model library, a number of simulation experiments are performed to verify the accuracy and predictability of the model
prior to release to production for circuit CAD. Different model cards (e.g.,
logic and SRAM) have different requirements for model validation and
there are several ways to check the robustness of the extracted model.
In general, the model validation includes (1) verification of the simulated
device performance matrix such I on , I off , V th , and ring-oscillator speed to the
target specifications; (2) scalability of device performance; and (3) compatibility with external circuit simulation tools to ensure convergence of circuit
simulation.
12.3 Model Usage
The usage of the model cards or library is described in the example model
library. The model card similar to ex1mod0p1.l can be used for corner simulation using systematic ±3σ extreme corners (SS, FF) and (FS, SF) intermediate corners defined in Table 12.2 as well as MC statistical analysis. In order
to select appropriate simulation setup (e.g., corners or MC), the appropriate input command must be used to select the flags in HSPICE netlist. The
appropriate switches (flags) to turn on or off the target method of simulation
using ex1mod0p1.l are shown in Table 12.4.
Thus, for circuit analysis using the model card in ex1mod0p1.l, the following commands are used in HSPICE circuit input file or netlist.
TABLE 12.4
Assignment of Different Flags in the HSPICE Netlist to Set up Circuit Analysis
Using the Compact Model in Example1
Variation
Corner
mismatchflag
sigmavtflag
globalmcflag
global
[n/p] -
mean
global [n/p]
meansigma
global
[n/p]sigma
Systematic
Fixed
corners
0
0
0
*
*
*
Total variation Fixed
corners
0
1
0
*
*
*
Total variation MC
1
0
1
Systematic
mean
Die-to-die
spread
Within die
spread
Variation
around mean
MC
1
0
1
Systematic
mean
0
Within die
spread
Variation
around a
corner
MC
1
0
0
*
*
*