427
Compact Model Library for Circuit Simulation
set, process variability–induced device model parameters are obtained as
discussed in Chapter 8 [6–9].
12.2.2 Data Fitting to Extract Compact Model Parameters
After the required data acquisition for modeling, the data set is formatted
to the required format of the parameter extraction tool used for compact
model parameter extraction [3,4]. The detailed parameter extraction routine
is described in each tool [3,4]. A brief outline for fitting the data to the device
compact model is shown in the flowchart in Figure 12.3.
Figure 12.4a–f shows the typical measured and fitted nMOSFET device characteristics of an advanced CMOS technology obtained by BSIMProPlus [3].
The fitted data are within the acceptable range of tolerance to build the
model card of the representative CMOS technology.
In addition to fitting the basic device characteristics, the first and second
derivatives of I–V curves are fitted to extract the model parameters related to
g m , R out , and so on for both NMOS and PMOS devices.
TABLE 12.1
Selection of NMOS Device Characteristics for the Basic BSIM4 Compact Model
Parameter Extraction: All Characteristics are Obtained in the Ambient Temperature
Range −55°C < T < 125°C
Device
Data
V ds (V)
V gs (V)
V bs (V)
Objective
I ds − V gs
Constant:
~50 mV
Ramp: 0 to 1.1 * V dd
step ~ 50 mV
Constant: 0 to −V dd ,
step ~ −1.1 * V dd/ 4
Subthreshold region
and linear region
parameter extraction
I ds − V gs
Constant:
1.1 * V dd
Ramp: 0 to 1.1 * V dd
step ~ 50 mV
Constant: 0 to −V dd ,
step ~ −1.1 * V dd/ 4
Saturation region
parameter extraction
I ds − V ds
Ramp:
0 to 1.1 * V dd ,
step ~50 mV
Constant: 0 to
1.1 * V dd step
~ 1.1 * V dd /4
Constant: 0, −V dd /2,
−V dd
High field effect
parameter extraction,
e.g., output resistance
and early voltage
parameters
C gg − V gs 0
Ramp: −1.1 * V dd to
+1.1 * V dd
0
Intrinsic capacitance
model parameter
extraction
C gs − V gd Ramp: 0 to
1.1 * V dd
Constant: 0 to
1.1 * V dd step
~ 1.1 * V dd /4
0
Intrinsic capacitance
model parameter
extraction
C gd − V gd Ramp: 0 to
1.1 * V dd
Constant:
0 to 1.1 * V dd
step ~ 1.1 * V dd /4
0
Intrinsic capacitance
model parameter
extraction
Compact Model Library for Circuit Simulation
set, process variability–induced device model parameters are obtained as
discussed in Chapter 8 [6–9].
12.2.2 Data Fitting to Extract Compact Model Parameters
After the required data acquisition for modeling, the data set is formatted
to the required format of the parameter extraction tool used for compact
model parameter extraction [3,4]. The detailed parameter extraction routine
is described in each tool [3,4]. A brief outline for fitting the data to the device
compact model is shown in the flowchart in Figure 12.3.
Figure 12.4a–f shows the typical measured and fitted nMOSFET device characteristics of an advanced CMOS technology obtained by BSIMProPlus [3].
The fitted data are within the acceptable range of tolerance to build the
model card of the representative CMOS technology.
In addition to fitting the basic device characteristics, the first and second
derivatives of I–V curves are fitted to extract the model parameters related to
g m , R out , and so on for both NMOS and PMOS devices.
TABLE 12.1
Selection of NMOS Device Characteristics for the Basic BSIM4 Compact Model
Parameter Extraction: All Characteristics are Obtained in the Ambient Temperature
Range −55°C < T < 125°C
Device
Data
V ds (V)
V gs (V)
V bs (V)
Objective
I ds − V gs
Constant:
~50 mV
Ramp: 0 to 1.1 * V dd
step ~ 50 mV
Constant: 0 to −V dd ,
step ~ −1.1 * V dd/ 4
Subthreshold region
and linear region
parameter extraction
I ds − V gs
Constant:
1.1 * V dd
Ramp: 0 to 1.1 * V dd
step ~ 50 mV
Constant: 0 to −V dd ,
step ~ −1.1 * V dd/ 4
Saturation region
parameter extraction
I ds − V ds
Ramp:
0 to 1.1 * V dd ,
step ~50 mV
Constant: 0 to
1.1 * V dd step
~ 1.1 * V dd /4
Constant: 0, −V dd /2,
−V dd
High field effect
parameter extraction,
e.g., output resistance
and early voltage
parameters
C gg − V gs 0
Ramp: −1.1 * V dd to
+1.1 * V dd
0
Intrinsic capacitance
model parameter
extraction
C gs − V gd Ramp: 0 to
1.1 * V dd
Constant: 0 to
1.1 * V dd step
~ 1.1 * V dd /4
0
Intrinsic capacitance
model parameter
extraction
C gd − V gd Ramp: 0 to
1.1 * V dd
Constant:
0 to 1.1 * V dd
step ~ 1.1 * V dd /4
0
Intrinsic capacitance
model parameter
extraction