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Compact Models for Integrated Circuit Design
design, causing yield loss. The major problems with the worst-case corner
models are that in most cases the existing correlations between the device
parameters are ignored and the models include pessimistic corner values.
As a result, the models generate a large spread of data during analog circuit
simulation.
The worst-case corner models offer designers capability to simulate the
pass/fail results of a typical design and are usually pessimistic.
8.4.2 Statistical Corner Models
During IC chip manufacturing, a large set of ET data on critical device and
process parameters are collected for process monitoring. Therefore, unlike
fixed corner models, statistical corner models can be generated using ET
data from different die, wafers, and wafer lots collected over a certain
period of time to represent realistic process variability of a target technology [14–21].
In one approach, ET data are collected from a large number of sites of
the target technology. And, for each site of ET data a compact model file is
generated. Thus, a large number of compact model files, referred to as the
performance-aware model (PAM) cards, are generated for the target technology
[17,18]. In this approach about 1000 PAM cards or model files are generated
for realistic statistical analysis of circuit performance.
In another approach, ET data are used to determine the depth of the location
of device parameters in the distribution to generate corner models, referred
to as the location depth corner modeling (LDCM) [19]. In LDCM, the wafers corresponding to the extreme data points in the distribution are used to extract
separate compact models. Thus, using LDCM, the number of model cards is
reduced significantly (<20) in contrast to PAM. An enhanced LDCM is used
with proper guard banding to ensure design validation against future process shift from the baseline specifications [19].
8.4.3 Process Parameters–Based Compact Variability Modeling
The statistical modeling approach, referred to as the backward propagation
of variance (BPV) [20], formulates statistical models as a set of independent,
normally distributed process parameters. These parameters control the
variations seen in the device electrical performances through the behavior
described in the TT compact models. With recent extensions [21], BPV is
used to characterize physical process–related compact model parameters.
For an accurate analysis of process variability–induced circuit performance
variability using BPV, the TT model file must be physical, the sensitivity
matrix must be well-conditioned, and the variances of parameters must be
physically consistent.
Compact Models for Integrated Circuit Design
design, causing yield loss. The major problems with the worst-case corner
models are that in most cases the existing correlations between the device
parameters are ignored and the models include pessimistic corner values.
As a result, the models generate a large spread of data during analog circuit
simulation.
The worst-case corner models offer designers capability to simulate the
pass/fail results of a typical design and are usually pessimistic.
8.4.2 Statistical Corner Models
During IC chip manufacturing, a large set of ET data on critical device and
process parameters are collected for process monitoring. Therefore, unlike
fixed corner models, statistical corner models can be generated using ET
data from different die, wafers, and wafer lots collected over a certain
period of time to represent realistic process variability of a target technology [14–21].
In one approach, ET data are collected from a large number of sites of
the target technology. And, for each site of ET data a compact model file is
generated. Thus, a large number of compact model files, referred to as the
performance-aware model (PAM) cards, are generated for the target technology
[17,18]. In this approach about 1000 PAM cards or model files are generated
for realistic statistical analysis of circuit performance.
In another approach, ET data are used to determine the depth of the location
of device parameters in the distribution to generate corner models, referred
to as the location depth corner modeling (LDCM) [19]. In LDCM, the wafers corresponding to the extreme data points in the distribution are used to extract
separate compact models. Thus, using LDCM, the number of model cards is
reduced significantly (<20) in contrast to PAM. An enhanced LDCM is used
with proper guard banding to ensure design validation against future process shift from the baseline specifications [19].
8.4.3 Process Parameters–Based Compact Variability Modeling
The statistical modeling approach, referred to as the backward propagation
of variance (BPV) [20], formulates statistical models as a set of independent,
normally distributed process parameters. These parameters control the
variations seen in the device electrical performances through the behavior
described in the TT compact models. With recent extensions [21], BPV is
used to characterize physical process–related compact model parameters.
For an accurate analysis of process variability–induced circuit performance
variability using BPV, the TT model file must be physical, the sensitivity
matrix must be well-conditioned, and the variances of parameters must be
physically consistent.