4
Compact Models for Integrated Circuit Design
1.2 Brief History of Compact Device Modeling
Since the 1960s, compact models for circuit CAD have continuously
evolved [6]. After the invention of the bipolar transistor in 1947 [11,12], complete circuits including both active and passive devices were realized on
monolithic silicon substrates by late 1950s. Computer simulation evolved
as a practical way to predict circuit performance including nonlinearities
because digital computers were capable of complex circuit analysis based on
a network or matrix formulation. The 1950s and 1960s were dominated by BJT
technology; the Ebers–Moll (EM) model has been the major large-signal compact model for bipolar transistors since its formulation in 1954 [13]. It is based
directly on device physics and covers all operating regimes, that is, active,
saturation, and cut-off operations of BJTs. However, various approximations
limit the accuracy of the model. To overcome the limitation of the EM model,
Gummel and Poon reported a BJT model based on integrated charge control
relations, in 1970 [14]. The Gummel–Poon (GP) model offers a very clear and
standardized description of existing physical effects in BJTs. Due to its simple
yet physical model formulation, GP model remains the most popular BJT
model till date. By the early 1970s, the circuit simulator had become a useful tool, essentially replacing the breadboarding of prototypes. The circuit
CAD tool, Simulation Program with Integrated Circuit Emphasis (SPICE) from
the University of California, Berkeley, became a widely used tool among the
circuit design community [15]. Thus, with the introduction of SPICE, the compact model has become essential for circuit CAD. Meanwhile, the IC industry had reached an important juncture in its development. While the 1950s
and 1960s were dominated by BJT technology, the 1970s saw MOS technology
begin to overtake BJT technology in terms of functional complexity and level
of integration. Thus, from simple basic compact MOSFET models, sophisticated models for FETs started to emerge. Today’s sophisticated compact models
for MOSFETs [4,16–20] evolved from models first developed 30 to 50 years
ago [13,14,21–24]. A large number of developers have contributed to the evolution of compact modeling. In this section, we present only a brief history of
the major development in the compact MOSFET modeling activities.
1.2.1 Early History of Compact MOSFET Modeling
In the early 1960s, MOSFET devices were introduced in fabricating ICs [25].
In order to understand the behavior of these emerging MOSFET devices,
research effort on the development of semi-analytical models using simple
device structures and simplified device physics started in the 1960s [21,26].
In 1964, Ihantola and Moll reported the design theory of MOSFET devices
and developed the drain current (I ds ) equation to account for the varying
bulk charge effect in the devices [21]. In the same year, Sah reported a simple theory of the MOSFET devices using valid approximations and simple
Compact Models for Integrated Circuit Design
1.2 Brief History of Compact Device Modeling
Since the 1960s, compact models for circuit CAD have continuously
evolved [6]. After the invention of the bipolar transistor in 1947 [11,12], complete circuits including both active and passive devices were realized on
monolithic silicon substrates by late 1950s. Computer simulation evolved
as a practical way to predict circuit performance including nonlinearities
because digital computers were capable of complex circuit analysis based on
a network or matrix formulation. The 1950s and 1960s were dominated by BJT
technology; the Ebers–Moll (EM) model has been the major large-signal compact model for bipolar transistors since its formulation in 1954 [13]. It is based
directly on device physics and covers all operating regimes, that is, active,
saturation, and cut-off operations of BJTs. However, various approximations
limit the accuracy of the model. To overcome the limitation of the EM model,
Gummel and Poon reported a BJT model based on integrated charge control
relations, in 1970 [14]. The Gummel–Poon (GP) model offers a very clear and
standardized description of existing physical effects in BJTs. Due to its simple
yet physical model formulation, GP model remains the most popular BJT
model till date. By the early 1970s, the circuit simulator had become a useful tool, essentially replacing the breadboarding of prototypes. The circuit
CAD tool, Simulation Program with Integrated Circuit Emphasis (SPICE) from
the University of California, Berkeley, became a widely used tool among the
circuit design community [15]. Thus, with the introduction of SPICE, the compact model has become essential for circuit CAD. Meanwhile, the IC industry had reached an important juncture in its development. While the 1950s
and 1960s were dominated by BJT technology, the 1970s saw MOS technology
begin to overtake BJT technology in terms of functional complexity and level
of integration. Thus, from simple basic compact MOSFET models, sophisticated models for FETs started to emerge. Today’s sophisticated compact models
for MOSFETs [4,16–20] evolved from models first developed 30 to 50 years
ago [13,14,21–24]. A large number of developers have contributed to the evolution of compact modeling. In this section, we present only a brief history of
the major development in the compact MOSFET modeling activities.
1.2.1 Early History of Compact MOSFET Modeling
In the early 1960s, MOSFET devices were introduced in fabricating ICs [25].
In order to understand the behavior of these emerging MOSFET devices,
research effort on the development of semi-analytical models using simple
device structures and simplified device physics started in the 1960s [21,26].
In 1964, Ihantola and Moll reported the design theory of MOSFET devices
and developed the drain current (I ds ) equation to account for the varying
bulk charge effect in the devices [21]. In the same year, Sah reported a simple theory of the MOSFET devices using valid approximations and simple