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Compact Models for Integrated Circuit Design
charges Q G , Q S , Q D , and Q B can follow the voltage variations. This implies
that the terminal currents vary instantaneously with the terminal voltages.
Thus, at any time t the charge per unit area is due to dynamic and DC operation is the same. The dynamic model developed by quasistatic assumption
is called the quasistatic model. In practice, the quasistatic model works quite
well for much of the circuit CAD. However, this approach may fail, especially
with long channel devices operating at high switching speeds, or when the load
capacitance is very small.
Assuming quasistatic operation, the total transient current at each terminal can be expressed as the sum of the time-dependent transport current and
a charging current as
i t
I V t
dQ
dt
i t
I V t
dQ
dt
i t
dQ
dt
i t
s
s
S
d
d
D
g
G
b
( )
( )
( )
( )
( )
( )
= − [ ]+
= − [ ]+
=
= =
dQ
dt
B
(6.4)
where we assumed that no transport current is flowing to the gate (I g  = 0)
and substrate (I b  = 0). In Equation 6.4, we have assumed that Q S and Q D are
known. However, we only know the total inversion or channel charge Q I
so that
i t
I V t
dQ
dt
i i I V t
dQ
dt
s
s
S
s
d
ds
I
( )
( )
( )
= − [ ]+
+ = [ ]+
(6.5)
However, Equation 6.5 is unsuitable for circuit simulation, since circuit
CAD requires separate expressions for i s and i d . Thus, in order to develop a
dynamic MOSFET model for circuit CAD, it is necessary to derive expressions for Q G , Q B , and Q I as functions of terminal voltages.
In order to derive the expressions for Q G , Q B , and Q I as functions of terminal
voltages, we use the corresponding known steady-state charges Q g (y), Q b (y),
and Q i (y) per unit area at any point y along the length of the channel. By
integrating these charges over the area of the active gate region we can obtain
the corresponding total charge Q G , Q B , and Q I . Now, the gate charge contained
in a small area of device width W and length dy is Q g ∙W∙dy. Then integrating
this charge over the channel length L gives the total gate charge Q G as
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