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Compact Models for Integrated Circuit Design
b. Write one-dimensional Poisson equation that you will solve to
obtain the surface potential in the accumulation region.
c. Derive an expression for the accumulation charge.
d. Derive an expression for surface potential.
Clearly state any assumption you make.
3.3 In Equation 3.40, we find that the inversion carrier density, n(x)
in a p-type substrate increases exponentially as exp(f(x)/v kT ) as x
approaches to the surface at x = 0. In other words, we can consider,
n(x) decreases away from the surface as exp(–f(x)/v kT ) and approaches
to a minimum value at x = X inv , defined as the inversion layer thickness. Thus, all the minority carrier electrons are confined in a region
bounded by the depth X inv , where the intrinsic band energy, E i intersects the Fermi level, E f . Here, f(x) is the potential at any point x from
the surface and v kT is the thermal voltage at the ambient temperature
T. If an MOS capacitor system on a uniformly doped p-type substrate
with doping concentration N a = 1 × 10 17 cm –3 operating in the inversion region,
a. Calculate the maximum width of the depletion layer into the silicon (x-direction).
b. Considering the inversion carrier concentration, n inv ∝ exp(-f/v kT )
along x-direction into the silicon and n inv ∼ 0 @ x = X inv whereas
n inv = n surf and f = f s @ x = 0:
i. Calculate the potential drop Δf @ x = X inv .
ii. Now assume that the device is in weak inversion (f B < f s < 2f B )
so that Q b >> Q inv , then use Gauss’s law and Δf expression
from part (b)(i) to show:
X
v
K
qN
inv
k T
si
a s
=
ε
φ
0
2
where:
f is the potential at any point in silicon
K si is the dielectric constant of silicon
ε 0 is the permittivity of free space
f s is the surface potential
c. Calculate the thickness of the inversion layer, X inv in silicon.
d. Sketch the band diagram into the substrate and clearly explain
and label the following parameters with reference to Si/SiO 2
interface:
i. Surface potential, f s
ii. Bulk potential, f B
Compact Models for Integrated Circuit Design
b. Write one-dimensional Poisson equation that you will solve to
obtain the surface potential in the accumulation region.
c. Derive an expression for the accumulation charge.
d. Derive an expression for surface potential.
Clearly state any assumption you make.
3.3 In Equation 3.40, we find that the inversion carrier density, n(x)
in a p-type substrate increases exponentially as exp(f(x)/v kT ) as x
approaches to the surface at x = 0. In other words, we can consider,
n(x) decreases away from the surface as exp(–f(x)/v kT ) and approaches
to a minimum value at x = X inv , defined as the inversion layer thickness. Thus, all the minority carrier electrons are confined in a region
bounded by the depth X inv , where the intrinsic band energy, E i intersects the Fermi level, E f . Here, f(x) is the potential at any point x from
the surface and v kT is the thermal voltage at the ambient temperature
T. If an MOS capacitor system on a uniformly doped p-type substrate
with doping concentration N a = 1 × 10 17 cm –3 operating in the inversion region,
a. Calculate the maximum width of the depletion layer into the silicon (x-direction).
b. Considering the inversion carrier concentration, n inv ∝ exp(-f/v kT )
along x-direction into the silicon and n inv ∼ 0 @ x = X inv whereas
n inv = n surf and f = f s @ x = 0:
i. Calculate the potential drop Δf @ x = X inv .
ii. Now assume that the device is in weak inversion (f B < f s < 2f B )
so that Q b >> Q inv , then use Gauss’s law and Δf expression
from part (b)(i) to show:
X
v
K
qN
inv
k T
si
a s
=
ε
φ
0
2
where:
f is the potential at any point in silicon
K si is the dielectric constant of silicon
ε 0 is the permittivity of free space
f s is the surface potential
c. Calculate the thickness of the inversion layer, X inv in silicon.
d. Sketch the band diagram into the substrate and clearly explain
and label the following parameters with reference to Si/SiO 2
interface:
i. Surface potential, f s
ii. Bulk potential, f B