578
Digital Electronics
Register-2
Register-3
Register-n
Register-1
Decoder
MUX-A
ALU
MUX-B
Figure 14.13 Register-based processor architecture.
14.3.3.3 Stack-based Architecture
In stack-based architecture, both operands and the operation to be performed are stored on the stack,
which could be configured around dedicated registers or a special portion of RAM. The result of
operation is placed back on the stack. Figure 14.14 shows typical block schematic arrangement of this
type of architecture.
ALU
Stack Top
Stack
Figure 14.14 Stack-based processor architecture.
Digital Electronics
Register-2
Register-3
Register-n
Register-1
Decoder
MUX-A
ALU
MUX-B
Figure 14.13 Register-based processor architecture.
14.3.3.3 Stack-based Architecture
In stack-based architecture, both operands and the operation to be performed are stored on the stack,
which could be configured around dedicated registers or a special portion of RAM. The result of
operation is placed back on the stack. Figure 14.14 shows typical block schematic arrangement of this
type of architecture.
ALU
Stack Top
Stack
Figure 14.14 Stack-based processor architecture.
