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Digital Electronics
14.3.2 Mapping Special-Function Registers into Memory Space
There are again two fundamental architectures used for mapping special-function registers into memory
space. In the first type of arrangement, I/O space and memory space are separated as shown in Fig.
14.11(a). I/O devices have a separate address space, which is accomplished by either an extra I/O pin
on the CPU physical interface or through a dedicated I/O bus. As a result of this, access to I/O control
registers requires special instructions. It is particularly attractive in CPUs having a limited addressing
capability. It is generally found on Intel microprocessors.
In the second arrangement, called the memory-mapped I/O, I/O control registers are mapped into
memory address space as shown in Fig. 14.11(b). Read and write operations to the control registers
are done via absolute memory addresses, which could be variables at absolute addresses or pointers
to absolute addresses in high-level languages. In this case, no special instructions are needed to
access I/O control registers. The memory-mapped I/O uses the same bus to address both memory
and I/O devices. CPU instructions used to read from or write to memory are also used in accessing
I/O devices.
RAM
Special
Function
Registers
(a)
RAM
(b)
Special
Function
Registers
Figure 14.11 (a) Separate I/O and memory spaces and (b) memory-mapped I/O.