Microprocessors
547
13.10 16-Bit Microprocessors
Eight-bit microprocessors are limited in their speed (the number of instructions that can be executed in
1 s), directly addressable memory, data handling capability, etc. Advances in semiconductor technology
have made it possible for the manufacturers to develop 16-bit, 32-bit, 64-bit and even-larger-bit
microprocessors. This section describes the block diagram, pin-out configuration and salient features
of some of the most popular 16-bit microprocessors including 8086 of Intel and Motorola’s MC68000.
13.10.1 8086 Microprocessor
This is a 16-bit microprocessor introduced by Intel. It was designed using HMOS technology and
contains approximately 29 000 transistors. It has a maximum operating frequency of 10 MHz. The 8086,
8088, 80186 and 80286 microprocessors have the same basic set of registers and addressing modes.
The 8086 microprocessor is available in DIP, CeraDIP and PLCC packages. Figure 13.15 shows a
block diagram of 8086.
13.10.1.1 8086 registers
8086 has four segment registers and other general-purpose registers. The segment registers include
code segment (CS), stack segment (SS), data segment (DS) and extra segment (ES). The generalpurpose registers of 8086 include the accumulator register, base register, count register, data register,
stack pointer (SP), base pointer (BP), source index (SI) and destination index (DI). The stack pointer,
base pointer, source index and destination index registers are both general and index registers. Other
registers include the instruction pointer (IP) and the flag register containing nine one-bit flags.
13.10.1.2 Addressing modes
The addressing modes of 8086 are implied addressing, register addressing, immediate addressing, direct
addressing, register indirect addressing, base addressing, indexed addressing, base indexed addressing
and base indexed with displacement addressing.
13.10.1.3 Internal Architecture and Pin-out Configuration
The internal functions of the 8086 processor are portioned logically into two processing units. The
first is the bus interface unit (BIU) and the second is the execution unit (EU), as shown in Fig. 13.15.
The BIU provides the functions related to instruction fetching and queuing, operand fetch and store
and address relocation. It also provides the basic bus control. The EU receives prefetched instructions
from the BIU queue and provides unrelocated operand addresses to the BIU.
13.10.1.4 Instruction set
The instruction set includes the following: data transfer operations, arithmetic operations, logical
instructions, string manipulation instructions, control transfer instructions, processor control instructions
and input/output operations.
Précédent

- 564/741

Suivant