Microprocessors
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13.8 RISC Versus CISC Processors
CISC is an acronym for Complex Instruction Set Computer. The primary goal of CISC architecture
is to complete a task in as few lines of assembly as possible. This is achieved by building processor
hardware that is capable of understanding and executing a series of complex operations. In this case,
each instruction can execute several low-level instructions. One of the primary advantages of this
system is that the compiler has to do very little work to translate a high-level language statement
into assembly. Because the length of the code is relatively short, very little RAM is required to store
instructions. In a nutshell, the emphasis is to build complex instructions directly into the hardware.
Examples of CISC processors are the CDC 6600, System/360, VAX, PDP-11, the Motorola 68000
family, and Intel and AMD x86 CPUs.
RISC is an acronym for Reduced Instruction Set Computer. This type of microprocessor
emphasizes simplicity and efficiency. RISC designs start with a necessary and sufficient instruction
set. The objective of any RISC architecture is to maximize speed by reducing clock cycles
per instruction. Almost all computations can be done from a few simple operations. The goal
of RISC architecture is to maximize the effective speed of a design by performing infrequent
operations in software and frequent functions in hardware, thus obtaining a net performance
gain.
To understand this phenomenon, consider any assembly-level language program. It has been observed
that it uses the MOV instruction much more frequently than the MUL instruction. Therefore, if the
architectural design implements MOV in hardware and MUL in software, there will be a considerable
gain in speed, which is the basic feature of RISC technology. Examples of RISC processors include
Sun’s SPARC, IBM and Motorola’s PowerPCs, and ARM-based processors.
The salient features of a RISC processor are as follows:
1. The microprocessor is designed using hard-wired control. For example, one bit can be dedicated for
one instruction. Generally, variable-length instruction formats require microcode design. All RISC
instructions have fixed formats, so no microcode is required.
2. The RISC microprocessor executes most of the instructions in a single clock cycle. This is due to
the fact that they are implemented in hardware.
3. The instruction set typically includes only register-to-register load and store.
4. The instructions have a simple format with few addressing modes.
5. The RISC microprocessor has several general-purpose registers and large cache memories, which
support the very fast access of data.
6. The RISC microprocessor processes several instructions simultaneously and so includes pipelining.
7. The software can take advantage of more concurrency.
13.9 Eight-Bit Microprocessors
This section describes the block diagram, pin-out diagram, salient features and instruction set of the
most popular eight-bit microprocessors, namely 8085 of Intel, Z80 of Zilog and 6800 of Motorola.
13.9.1 8085 Microprocessor
Figure 13.11 gives the pin-out configuration and Fig. 13.12 shows a block diagram of the 8085
microprocessor. Table 13.3 lists the pin details.
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