Counters and Registers
471
C
J
K
Cl
Clk
B
J
K
Cl
Clk
FF-A
A
A
J
K
Cl
Clk
Clock
1
Output
Figure 11.56 Problem 7.
10. Refer to the three-bit counter arrangement of Fig. 11.57. Determine its count sequence and also
determine whether the counter is self-starting. (A counter is self-starting if it automatically goes
to one of the desired states with subsequent clock pulse in case it lands itself accidentally into any
of the undesired states.)
000, 001, 010, 011, 100, 000, ; not self starting
J
C
C
K
Clk
J
B
K
J
A
K
B
Clk
B
A
1
C
Clk
Figure 11.57 Problem 10.
Further Reading
1. Langholz, G., Mott, J. L. and Kandel, A (1998) Foundations of Digital Logic Design, World Scientific Publ.
Co. Inc., NJ, USA.
2. Cook, N. P. (2003) Practical Digital Electronics, Prentice-Hall, NJ, USA.