Flip-Flops and Related Devices
397
Q
Clk FF
J
K
D
Figure 10.40 J -K flip-flop as a D flip-flop.
Q
Enable FF
D
Enable
D-Input
Q-Output
(a)
Q
Clk
FF
D
CLK
D-Input
Q-Output
(b)
Figure 10.41 Comparison between a D-type latch and a D flip-flop.
A D flip-flop should not be confused with a D latch. In a D flip-flop, the data on the D input are
transferred to the Q output on the positive- or negative-going transition of the clock signal, depending
upon the flip-flop, and this logic state is held at the output until we get the next effective clock
transition. The difference between the two is further illustrated in Figs 10.41(a) and (b) depicting the
functioning of a D latch and a D flip-flop respectively.
397
Q
Clk FF
J
K
D
Figure 10.40 J -K flip-flop as a D flip-flop.
Q
Enable FF
D
Enable
D-Input
Q-Output
(a)
Q
Clk
FF
D
CLK
D-Input
Q-Output
(b)
Figure 10.41 Comparison between a D-type latch and a D flip-flop.
A D flip-flop should not be confused with a D latch. In a D flip-flop, the data on the D input are
transferred to the Q output on the positive- or negative-going transition of the clock signal, depending
upon the flip-flop, and this logic state is held at the output until we get the next effective clock
transition. The difference between the two is further illustrated in Figs 10.41(a) and (b) depicting the
functioning of a D latch and a D flip-flop respectively.