Flip-Flops and Related Devices
385
Q
K
J
Clk
FF
(a)
Operation Mode
SET
RESET
NO CHANGE
TOGGLE
J
1
0
0
1
K
0
1
0
1
Clk
1
1
1
1
1
0
Q n
Q n
Q
K
J
Clk FF
(b)
Operation Mode
SET
RESET
NO CHANGE
TOGGLE
J
0
1
1
0
K
1
0
1
0
Clk
1
1
1
1
1
0
Q n
Q n
—
—
Q
Q
Q n+1
Q n+1
Figure 10.26 (a) J -K flip-flop active HIGH inputs and (b) J -K flip-flop active LOW inputs.
Q
S
Q
–
R
K
J
FF
Figure 10.27 Realization of a J -K flip-flop using an R-S flip-flop.
Example 10.3
Draw the circuit symbol of the flip-flop represented by the function table of Fig. 10.31(a).
Solution
The first three entries of the function table indicate that the J -K flip-flop has active HIGH PRESET
and CLEAR inputs. Referring to the fourth and fifth entries of the function table, it has active LOW
J and K inputs. The seventh row of the function table confirms this. The output responds to positive
(LOW-to-HIGH) edges of the clock input. Thus, the flip-flop represented by the given function table
is a presettable, clearable, positive edge-triggered flip-flop with active HIGH PRESET and CLEAR