Programmable Logic Devices
355
C
B
A
X
Y
Figure 9.45 Problem 5.
Further Reading
1. Seals, R. C. and Whapshott, G. F. (1997) Programmable Logic: PLDs and FPGAs, McGraw-Hill, USA.
2. Dueck, R. (2003) Digital Design with CPLD Applications and VHDL, Thomson Delmar Learning, New York,
USA.
3. Chartrand, L. (2003) Digital Fundamentals: Experiments and Concepts with CPLD, Thomson Delmar Learning,
New York, USA.
4. Oldfield, J. and Dorf, R. (1995) Field Programmable Gate Arrays, John Wiley & Sons, Inc., New York, USA.
5. Trimberger, S. (Ed.) (1994) Field Programmable Gate Array Technology, Kluwer Academic Publishers, MA,
USA.
6. Brown, S., Francis, R., Rose, J. and Vranesic, Z. (1992) Field Programmable Gate Arrays, Kluwer Academic
Publishers, MA, USA.
355
C
B
A
X
Y
Figure 9.45 Problem 5.
Further Reading
1. Seals, R. C. and Whapshott, G. F. (1997) Programmable Logic: PLDs and FPGAs, McGraw-Hill, USA.
2. Dueck, R. (2003) Digital Design with CPLD Applications and VHDL, Thomson Delmar Learning, New York,
USA.
3. Chartrand, L. (2003) Digital Fundamentals: Experiments and Concepts with CPLD, Thomson Delmar Learning,
New York, USA.
4. Oldfield, J. and Dorf, R. (1995) Field Programmable Gate Arrays, John Wiley & Sons, Inc., New York, USA.
5. Trimberger, S. (Ed.) (1994) Field Programmable Gate Array Technology, Kluwer Academic Publishers, MA,
USA.
6. Brown, S., Francis, R., Rose, J. and Vranesic, Z. (1992) Field Programmable Gate Arrays, Kluwer Academic
Publishers, MA, USA.
