340
Digital Electronics
braces to define a block of code, and also that Verilog does not have structures, pointers and recursive
subroutines. Also, the definition of constants in Verilog requires bit width along with their base.
9.11.4 Java HDL
Java HDL (JHDL) was developed in the Configurable Computing Laboratory of Brigham Young
University (BYU). It is a low-level hardware description language that primarily uses an object-oriented
approach to build circuits. It was developed primarily for the design of FPGA-based hardware, and
developers have paid particular attention to supporting the Xilinx series of FPGA chips.
9.12 Application Information on PLDs
In this section, we will look at salient features of some of the commonly used programmable logic
devices including SPLDs such as PALs/GALs, CPLDs and FPGAs covering a wide spectrum of devices
from leading international manufacturers. Other application-relevant information such as internal
architecture, pin connection diagram, etc., is also given for some of the more popular type numbers.
9.12.1 SPLDs
Some of the famous companies that offer SPLDs include Advanced Micro Devices (AMD), Altera,
Philips-Signetics, Cypress, Lattice Semiconductor Corporation and ICT. A large range of SPLD
products are available from these companies. All of these SPLDs share some common features in
terms of the nature of the programmable logic planes, configurable output logic, etc. However, each
of these logic devices does offer some unique features that make it particularly attractive for some
applications. Some of the widely exploited SPLDs include the 16XX series (16L8, 16R8,16R6 and
16R4) and 22V10 from AMD and EP610 from Altera. These devices are also widely second-sourced
by many companies. The Plus 16XX series from Philips is 100 % pin and functional compatible with
the 16XX series. 16R8 in the 16XX series and 22V10 PAL devices are industry standards and are
widely second-sourced. We will discuss 16XX and 22V10 in a little more detail in the following
paragraphs.
The 16XX family of PAL devices employs the familiar sum-of-products implementation comprising
a programmable AND array and a fixed OR array. The family offers four PAL-type devices including
16L8, 16R8, 16R6 and 16R4.
Each of the devices in the 16XX family is characterized by a certain number of combinational
and registered outputs available to the designer. The devices have three-state output buffers on each
output pin, which can be programmed for individual control of all outputs. Other features include
the availability of programmable bidirectional pins and output registers. These devices are capable
of replacing an equivalent of four or more SSI/MSI integrated circuits. The I/O configuration of the
four devices in the 16XX family is summarized in Table 9.5. Figures 9.35(a) to (d) give the basic
architecture/pin connections of 16L8, 16R8, 16R6 and 16R4 respectively.
As outlined earlier, many companies offer 22V10 PAL devices. These are available in both bipolar
and CMOS technologies. One such contemporary device is GAL 22V10 from Lattice Semiconductor
Corporation. As inherent in the type number, the device offers a maximum of 22 inputs and 10 outputs.
The outputs are versatile. That is, each one of them can be configured by the user to be either a
combinational or registered output. Also, the outputs can be configured to be either active HIGH or
active LOW.
Digital Electronics
braces to define a block of code, and also that Verilog does not have structures, pointers and recursive
subroutines. Also, the definition of constants in Verilog requires bit width along with their base.
9.11.4 Java HDL
Java HDL (JHDL) was developed in the Configurable Computing Laboratory of Brigham Young
University (BYU). It is a low-level hardware description language that primarily uses an object-oriented
approach to build circuits. It was developed primarily for the design of FPGA-based hardware, and
developers have paid particular attention to supporting the Xilinx series of FPGA chips.
9.12 Application Information on PLDs
In this section, we will look at salient features of some of the commonly used programmable logic
devices including SPLDs such as PALs/GALs, CPLDs and FPGAs covering a wide spectrum of devices
from leading international manufacturers. Other application-relevant information such as internal
architecture, pin connection diagram, etc., is also given for some of the more popular type numbers.
9.12.1 SPLDs
Some of the famous companies that offer SPLDs include Advanced Micro Devices (AMD), Altera,
Philips-Signetics, Cypress, Lattice Semiconductor Corporation and ICT. A large range of SPLD
products are available from these companies. All of these SPLDs share some common features in
terms of the nature of the programmable logic planes, configurable output logic, etc. However, each
of these logic devices does offer some unique features that make it particularly attractive for some
applications. Some of the widely exploited SPLDs include the 16XX series (16L8, 16R8,16R6 and
16R4) and 22V10 from AMD and EP610 from Altera. These devices are also widely second-sourced
by many companies. The Plus 16XX series from Philips is 100 % pin and functional compatible with
the 16XX series. 16R8 in the 16XX series and 22V10 PAL devices are industry standards and are
widely second-sourced. We will discuss 16XX and 22V10 in a little more detail in the following
paragraphs.
The 16XX family of PAL devices employs the familiar sum-of-products implementation comprising
a programmable AND array and a fixed OR array. The family offers four PAL-type devices including
16L8, 16R8, 16R6 and 16R4.
Each of the devices in the 16XX family is characterized by a certain number of combinational
and registered outputs available to the designer. The devices have three-state output buffers on each
output pin, which can be programmed for individual control of all outputs. Other features include
the availability of programmable bidirectional pins and output registers. These devices are capable
of replacing an equivalent of four or more SSI/MSI integrated circuits. The I/O configuration of the
four devices in the 16XX family is summarized in Table 9.5. Figures 9.35(a) to (d) give the basic
architecture/pin connections of 16L8, 16R8, 16R6 and 16R4 respectively.
As outlined earlier, many companies offer 22V10 PAL devices. These are available in both bipolar
and CMOS technologies. One such contemporary device is GAL 22V10 from Lattice Semiconductor
Corporation. As inherent in the type number, the device offers a maximum of 22 inputs and 10 outputs.
The outputs are versatile. That is, each one of them can be configured by the user to be either a
combinational or registered output. Also, the outputs can be configured to be either active HIGH or
active LOW.