Programmable Logic Devices
327
E
2
CMOS
Programmable
AND-Array
OLMC
Input/Output-1
OLMC
Input/Output-2
OLMC
Input/Output-3
Input-1
Input-2
Input-n
(a)
4-to-1
MUX
S1
S0
D
FF
Q
Q
I/O
2-to-1
MUX
S1
From
Programmable
AND-Array
To
Programmable
AND-Array
(b)
Figure 9.23 (a) Generic array logic generalized block schematic and (b) architecture of an OLMC.
array is not just programmable as is the case in a PAL device but is reprogrammable. That is, it
can be reprogrammed any number of times. This has been made possible by the use of electrically
erasable PROM cells for storing the programming pattern. The other difference is in the use of
reprogrammable output logic, which provides more flexibility to the designer. GAL devices employ
output logic macrocells (OLMCs) at the output, which allows the designer to configure the outputs
either as combinational outputs or registered outputs.