322
Digital Electronics
clock
Output
Enable
Programmable AND-array
FF
Q
Q
F
Figure 9.20 Output logic arrangements in a PAL device.
Table 9.3 PAL numbering system.
Architecture – Combinational devices
Architecture – Registered devices
Code
Description
Code
Description
Letter
letter
H
Active HIGH outputs
R
Registered outputs
L
Active LOW outputs
X
EXCLUSIVE-OR gates
P
Programmable output polarity
RP
Registered polarity
Programmable
C
Complementary outputs
RS
Registered-term steering
XP
EXCLUSIVE-OR gateV
Versatile varied
Programmable
Product terms
S
Product term steering
RX
Registered EX-OR
MA
Macrocell
from combinational and registered outputs. For example, PAL-16L8 has 10 dedicated inputs and six
inputs accessible from I/O pins.
In addition to the numbering system described above, an alphanumeric designation on the extreme
left may be used to indicate the technology used. ‘C’ stands for CMOS, ‘10H’ for 10KH ECL and
‘100’ for 100K ECL. TTL is represented by a blank. A letter on the extreme right may be used to