270
Digital Electronics
(a)
(b)
0
4-to-1
MUX
O/P
X 1
X 0
Y
1
2
3
0
0
1
1
X 1
0
1
0
1
X 0
I 0
I 1
I 2
I 3
Y
I 0
I 1
I 2
I 3
Figure 8.1 (a) 4-to-1 multiplexer circuit representation and (b) 4-to-1 multiplexer truth table.
8-to-1
MUX
G
A
B
C
D0
D1
D2
D3
D4
D5
D6
D7
(a)
(b)
W
Y
X
L
L
L
L
H
H
H
H
L
D0
D1
D2
D3
D4
D5
D6
D7
Output
Y
W
Enable
G
Select
C
B
A
Inputs
X
L
L
H
H
L
L
H
H
X
L
H
L
H
L
H
L
H
H
L
L
L
L
L
L
L
L
H
D0
D1
D2
D3
D4
D5
D6
D7
G : ENABLE input
A, B, C : Select inputs
D0-D7 : Data inputs
Y,W : outputs
Figure 8.2 (a) 8-to-1 multiplexer circuit representation and (b) 8-to-1 multiplexer truth table.