Logic Families
147
• In the LOW-state,
– the gate 1 output sinking capability = 16 mA;
– the gate 2 input sinking requirement = 2 mA;
– the gate 3 input sinking requirement = 0.4 × 2 = 0.8 mA;
– the gate 4 input sinking requirement = 1.6 mA;
– the total input current requirement = 4.4 mA;
– since the output of gate 1 has a current sinking capability of 16 mA, the fan-out capability is not
exceeded in the LOW state either.
5.4 Emitter Coupled Logic (ECL)
The ECL family is the fastest logic family in the group of bipolar logic families. The characteristic
features that give this logic family its high speed or short propagation delay are outlined as follows:
1. It is a nonsaturating logic. That is, the transistors in this logic are always operated in the active
region of their output characteristics. They are never driven to either cut-off or saturation, which
means that logic LOW and HIGH states correspond to different states of conduction of various
bipolar transistors.
2. The logic swing, that is, the difference in the voltage levels corresponding to logic LOW and HIGH
states, is kept small (typically 0.85 V), with the result that the output capacitance needs to be
charged and discharged by a relatively much smaller voltage differential.
3. The circuit currents are relatively high and the output impedance is low, with the result that the
output capacitance can be charged and discharged quickly.
5.4.1 Different Subfamilies
Different subfamilies of ECL logic include MECL-I, MECL-II, MECL-III, MECL 10K, MECL 10H
and MECL 10E (ECLinPS
TM and ECLinPS Lite
TM .
5.4.1.1 MECL-I, MECL-II and MECL-III Series
MECL-I was the first monolithic emitter coupled logic family introduced by ON Semiconductor
(formerly a division of Motorola SPS) in 1962. It was subsequently followed up by MECL-II in 1966.
Both these logic families have become obsolete and have been replaced by MECL-III (also called
the MC1600 series) introduced in 1968. Although, chronologically, MECL-III was introduced before
the MECL-10K and MECL-10H families, it features higher speed than both of its successors. With a
propagation delay of the order of 1 ns and a flip-flop toggle frequency of 500 MHz, MECL-III is used
in high-performance, high-speed systems.
The basic characteristic parameters of MECL-III are as follows: gate propagation delay = 1 ns;
output edge speed (indicative of the rise and fall time of output transition) = 1 ns; flip-flop
toggle frequency = 500 MHz; power dissipation per gate = 50 mW; speed–power product = 60 pJ;
input voltage = 0–V EE (V EE is the negative supply voltage); negative power supply range (for
V CC = 0) = −5.1V to −5.3 V; continuous output source current (max.) = 40 mA; surge output source
current (max.) = 80 mA; operating temperature range = −30 °C to +85 °C.
147
• In the LOW-state,
– the gate 1 output sinking capability = 16 mA;
– the gate 2 input sinking requirement = 2 mA;
– the gate 3 input sinking requirement = 0.4 × 2 = 0.8 mA;
– the gate 4 input sinking requirement = 1.6 mA;
– the total input current requirement = 4.4 mA;
– since the output of gate 1 has a current sinking capability of 16 mA, the fan-out capability is not
exceeded in the LOW state either.
5.4 Emitter Coupled Logic (ECL)
The ECL family is the fastest logic family in the group of bipolar logic families. The characteristic
features that give this logic family its high speed or short propagation delay are outlined as follows:
1. It is a nonsaturating logic. That is, the transistors in this logic are always operated in the active
region of their output characteristics. They are never driven to either cut-off or saturation, which
means that logic LOW and HIGH states correspond to different states of conduction of various
bipolar transistors.
2. The logic swing, that is, the difference in the voltage levels corresponding to logic LOW and HIGH
states, is kept small (typically 0.85 V), with the result that the output capacitance needs to be
charged and discharged by a relatively much smaller voltage differential.
3. The circuit currents are relatively high and the output impedance is low, with the result that the
output capacitance can be charged and discharged quickly.
5.4.1 Different Subfamilies
Different subfamilies of ECL logic include MECL-I, MECL-II, MECL-III, MECL 10K, MECL 10H
and MECL 10E (ECLinPS
TM and ECLinPS Lite
TM .
5.4.1.1 MECL-I, MECL-II and MECL-III Series
MECL-I was the first monolithic emitter coupled logic family introduced by ON Semiconductor
(formerly a division of Motorola SPS) in 1962. It was subsequently followed up by MECL-II in 1966.
Both these logic families have become obsolete and have been replaced by MECL-III (also called
the MC1600 series) introduced in 1968. Although, chronologically, MECL-III was introduced before
the MECL-10K and MECL-10H families, it features higher speed than both of its successors. With a
propagation delay of the order of 1 ns and a flip-flop toggle frequency of 500 MHz, MECL-III is used
in high-performance, high-speed systems.
The basic characteristic parameters of MECL-III are as follows: gate propagation delay = 1 ns;
output edge speed (indicative of the rise and fall time of output transition) = 1 ns; flip-flop
toggle frequency = 500 MHz; power dissipation per gate = 50 mW; speed–power product = 60 pJ;
input voltage = 0–V EE (V EE is the negative supply voltage); negative power supply range (for
V CC = 0) = −5.1V to −5.3 V; continuous output source current (max.) = 40 mA; surge output source
current (max.) = 80 mA; operating temperature range = −30 °C to +85 °C.