112
Digital Electronics
Figure 4.59 (Continued)
Y
'1'
Y
(a)
(b)
(c)
(d)
'0'
A
Y
A
A
A
Y
Figure 4.60 Solution to problem 5.
5. Draw logic implementation of an inverter using (i) two-input NAND, (ii) two-input NOR,
(iii) two-input EX-OR and (iv) two-input EX-NOR.
(i) Fig. 4.60(a); (ii) Fig. 4.60(b); (iii) Fig. 4.60(c); (iv) Fig. 4.60(d)