xii
Contents
8 Multiplexers and Demultiplexers
269
8.1 Multiplexer
269
8.1.1 Inside the Multiplexer
271
8.1.2 Implementing Boolean Functions with
Multiplexers
273
8.1.3 Multiplexers for Parallel-to-Serial Data Conversion
277
8.1.4 Cascading Multiplexer Circuits
280
8.2 Encoders
280
8.2.1 Priority Encoder
281
8.3 Demultiplexers and Decoders
285
8.3.1 Implementing Boolean Functions with Decoders
286
8.3.2 Cascading Decoder Circuits
288
8.4 Application-Relevant Information
293
Review Questions
294
Problems
295
Further Reading
298
9 Programmable Logic Devices
299
9.1 Fixed Logic Versus Programmable Logic
299
9.1.1 Advantages and Disadvantages
301
9.2 Programmable Logic Devices – An Overview
302
9.2.1 Programmable ROMs
302
9.2.2 Programmable Logic Array
302
9.2.3 Programmable Array Logic
304
9.2.4 Generic Array Logic
305
9.2.5 Complex Programmable Logic Device
306
9.2.6 Field-Programmable Gate Array
307
9.3 Programmable ROMs
308
9.4 Programmable Logic Array
312
9.5 Programmable Array Logic
317
9.5.1 PAL Architecture
319
9.5.2 PAL Numbering System
320
9.6 Generic Array Logic
325
9.7 Complex Programmable Logic Devices
328
9.7.1 Internal Architecture
328
9.7.2 Applications
330
9.8 Field-Programmable Gate Arrays
331
9.8.1 Internal Architecture
331
9.8.2 Applications
333
9.9 Programmable Interconnect Technologies
333
9.9.1 Fuse
334
9.9.2 Floating-Gate Transistor Switch
334
9.9.3 Static RAM-Controlled Programmable Switches
335
9.9.4 Antifuse
335
9.10 Design and Development of Programmable Logic Hardware
337
9.11 Programming Languages
338
9.11.1 ABEL-Hardware Description Language
339
9.11.2 VHDL-VHSIC Hardware Description Language
339
Contents
8 Multiplexers and Demultiplexers
269
8.1 Multiplexer
269
8.1.1 Inside the Multiplexer
271
8.1.2 Implementing Boolean Functions with
Multiplexers
273
8.1.3 Multiplexers for Parallel-to-Serial Data Conversion
277
8.1.4 Cascading Multiplexer Circuits
280
8.2 Encoders
280
8.2.1 Priority Encoder
281
8.3 Demultiplexers and Decoders
285
8.3.1 Implementing Boolean Functions with Decoders
286
8.3.2 Cascading Decoder Circuits
288
8.4 Application-Relevant Information
293
Review Questions
294
Problems
295
Further Reading
298
9 Programmable Logic Devices
299
9.1 Fixed Logic Versus Programmable Logic
299
9.1.1 Advantages and Disadvantages
301
9.2 Programmable Logic Devices – An Overview
302
9.2.1 Programmable ROMs
302
9.2.2 Programmable Logic Array
302
9.2.3 Programmable Array Logic
304
9.2.4 Generic Array Logic
305
9.2.5 Complex Programmable Logic Device
306
9.2.6 Field-Programmable Gate Array
307
9.3 Programmable ROMs
308
9.4 Programmable Logic Array
312
9.5 Programmable Array Logic
317
9.5.1 PAL Architecture
319
9.5.2 PAL Numbering System
320
9.6 Generic Array Logic
325
9.7 Complex Programmable Logic Devices
328
9.7.1 Internal Architecture
328
9.7.2 Applications
330
9.8 Field-Programmable Gate Arrays
331
9.8.1 Internal Architecture
331
9.8.2 Applications
333
9.9 Programmable Interconnect Technologies
333
9.9.1 Fuse
334
9.9.2 Floating-Gate Transistor Switch
334
9.9.3 Static RAM-Controlled Programmable Switches
335
9.9.4 Antifuse
335
9.10 Design and Development of Programmable Logic Hardware
337
9.11 Programming Languages
338
9.11.1 ABEL-Hardware Description Language
339
9.11.2 VHDL-VHSIC Hardware Description Language
339
