422
Also, if the hardware is aware of writes to persistent memory, some significant
performance gains can be seen with certain workloads by the reduction in the number
of round trip completions that software must wait for. This pipeline efficiency gains are
estimated to yield a 30-50% reduction in round-trip latency for the common database
SQL Tail-of-Log use case where a large write to persistent memory is followed by an
8-byte pointer update, to be written only after the first remote write data is considered
in the persistence domain. The first-generation software remote persistent methods
require two software round-trip completions for the initial SQL data write and again
for the small 8-byte pointer update write, as shown in Figure E-1A. In the improved
native hardware solution shown in Figure E-1B, software waits for a single round-trip
completion across the network.
These performance improvements are coming in a future Intel platform, native
Intel RDMA-capable NICs, and through industry networking standards. Other vendor’s
RDMA-capable NICs will also support the improved standard. Broad adoption is
required to allow users of any vendor’s NIC with any vendor’s persistent memory on any
number of platforms. To accomplish this, native persistent memory support is being
driven into the standardized iWarp wire protocol by the IETF, Internet Engineering
Taskforce and the standardized InfiniBand and RoCE wire protocol by the IBTA,
Figure E-1. The proposed RDMA protocol changes to efficiently support persistent
memory by avoiding Send or Read being called after a Write
Appendix e The FuTure oF remoTe persisTenT memory replicATion
Also, if the hardware is aware of writes to persistent memory, some significant
performance gains can be seen with certain workloads by the reduction in the number
of round trip completions that software must wait for. This pipeline efficiency gains are
estimated to yield a 30-50% reduction in round-trip latency for the common database
SQL Tail-of-Log use case where a large write to persistent memory is followed by an
8-byte pointer update, to be written only after the first remote write data is considered
in the persistence domain. The first-generation software remote persistent methods
require two software round-trip completions for the initial SQL data write and again
for the small 8-byte pointer update write, as shown in Figure E-1A. In the improved
native hardware solution shown in Figure E-1B, software waits for a single round-trip
completion across the network.
These performance improvements are coming in a future Intel platform, native
Intel RDMA-capable NICs, and through industry networking standards. Other vendor’s
RDMA-capable NICs will also support the improved standard. Broad adoption is
required to allow users of any vendor’s NIC with any vendor’s persistent memory on any
number of platforms. To accomplish this, native persistent memory support is being
driven into the standardized iWarp wire protocol by the IETF, Internet Engineering
Taskforce and the standardized InfiniBand and RoCE wire protocol by the IBTA,
Figure E-1. The proposed RDMA protocol changes to efficiently support persistent
memory by avoiding Send or Read being called after a Write
Appendix e The FuTure oF remoTe persisTenT memory replicATion