be found in conventional re-writable FPGAs. Almost 1/10 of lower power consumption is expected than conventional re-writable FPGAs because of the elimination of
configuration memories. Thanks to the atomic switches, soft-errors on logic circuit
connections are eliminated completely. Signal compensation functions are realized
in one chip without accommodating program memories used in conventional MCUs
while maintaining compatible operation performance with the combination of conventional FPGAs and MCUs, which enables embedding a processor element on each
infrared signal detector peripheral.
5.2 Onboard Calibration Functions for Infrared Image
Sensors
A typical processing function block diagram of an onboard infrared image sensor is
shown in Fig. 12. Each detector element of the sensor has a 12–16-bit digital data
output port. The sensitivity of each pixel is corrected using parameters stored in the
table implemented with static random access memories (SRAMs) or flash memories.
The corrected data are treated as the luminance of objects represented as 16-bit
digital data. Integral data over some frames is calculated to enhance intensity after
the above described correction, and detector allocation is relocated as required for
post processing. The luminance of each element is compressed as 16-bit digital
number (DN) after the onboard calibration. The data are formatted as tiles and
compressed by lossless image compression. The compressed data are formatted in
accordance with CCSDS recommendation [32].
The function block is usually built into an independent signal processing unit
because the size of circuitry is not small enough to build it into the inside of detector
units. These onboard signal processing functions are realized with the combination
of limited functions on FPGAs and flexible functions on MCUs. The function unit
requires a few modules using printed wired boards (PWBs). In consequence, miniaturized processing modules are demanded for future missions.
5.3 NanoBridge
®
We used a NanoBridge
® FPGA [20–23] for the evaluation. The basic configuration
of NanoBridge
® FPGA is a complementary atomic switch (CAS) [21, 22]. The CAS
Input channels
16
Luminance
compensation
Luminance calibration
table (SRAM)
Spatial calibration
table (SRAM)
RAM
Spatial
calibration
Integration and
Luminance/DN
conversion
Image
compression
Fig. 12 The block diagram of a typical onboard infrared image sensor [26]
50
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