IoT applications which require dependability as an essential feature. We also
introduce Generic Processor element (GPE) architecture to exploit atomic switches.
GPE architecture is based on the embedded automaton realized with the contribution
of high-level behavioral synthesis technology. Practical application implementation
on the reconfigurable processor is realized using the matured tool of high-level
behavioral synthesis technology.
1 Introduction
Sensor nodes are quickly becoming important elements of the Internet of things
(IoT) nowadays, that has become social information infrastructure [1]. Such sensor
nodes produce huge data. However, due to the capacity limitation of existing
communication networks, intelligent processing capabilities like selection, compression and optimization are more and more required before transmitting such vast
amount of data to cloud-servers for post-processing. Space system is a typical
use-case of IoT sensing node that requires high-level dependability like other high
reliability applications such as medical equipment and automotive. Especially the
tolerance against so called soft errors such as transient data errors caused by cosmic
radiation is a mandatory requirement for sensor nodes used in space. Field programmable gate array (FPGA) using atomic switch is a promising application for space
systems because of the radiation hardness of the switches.
A new computational model, which we call “Embedded Automaton” [2], is
introduced in this chapter to exploit the merit of atomic switch FPGAs. Conventional
microcontroller units (MCUs) used for IoT sensing nodes are designed with the
model based on finite automaton. The latent overhead of the implementation based
on finite automaton is easily identified by the comparison with Embedded Automaton. An architecture required for processor elements in IoT sensor nodes is discussed
by considering the latent overhead. The architecture is different from the so-called
stored program architecture. Differences between an MCU and an FPGA as a
processor element are also clarified in light of the concept of the Embedded Automaton. Notwithstanding, or rather because of the difference, MCUs and FPGAs are
expected to be integrated eventually, because flexible programming capability and
efficient implementation are often required in a system at the same time. Such
technology trend tells us that an MCU is not the only choice for developing intelligent
sensors of Internet of Things (IoT) applications. A dynamically reconfigurable
architecture (DRP) [3, 4] is often considered as a suitable candidate for embedded
applications, because it possesses both flexible programming capability and implementation efficiency. An advantage of dynamically reconfigurable architecture is
ultra-low power consumption. In comparison with a conventional MCU, power
consumption of 1/100 is expected for equivalent amount of computational as reported
in [5], because most of the chip area can be used for computational resources. Such
kind of advantage becomes good combination with atomic switches to realize high
processing speed with low power consumption. It is also explained in this chapter that
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H. Hihara et al.
introduce Generic Processor element (GPE) architecture to exploit atomic switches.
GPE architecture is based on the embedded automaton realized with the contribution
of high-level behavioral synthesis technology. Practical application implementation
on the reconfigurable processor is realized using the matured tool of high-level
behavioral synthesis technology.
1 Introduction
Sensor nodes are quickly becoming important elements of the Internet of things
(IoT) nowadays, that has become social information infrastructure [1]. Such sensor
nodes produce huge data. However, due to the capacity limitation of existing
communication networks, intelligent processing capabilities like selection, compression and optimization are more and more required before transmitting such vast
amount of data to cloud-servers for post-processing. Space system is a typical
use-case of IoT sensing node that requires high-level dependability like other high
reliability applications such as medical equipment and automotive. Especially the
tolerance against so called soft errors such as transient data errors caused by cosmic
radiation is a mandatory requirement for sensor nodes used in space. Field programmable gate array (FPGA) using atomic switch is a promising application for space
systems because of the radiation hardness of the switches.
A new computational model, which we call “Embedded Automaton” [2], is
introduced in this chapter to exploit the merit of atomic switch FPGAs. Conventional
microcontroller units (MCUs) used for IoT sensing nodes are designed with the
model based on finite automaton. The latent overhead of the implementation based
on finite automaton is easily identified by the comparison with Embedded Automaton. An architecture required for processor elements in IoT sensor nodes is discussed
by considering the latent overhead. The architecture is different from the so-called
stored program architecture. Differences between an MCU and an FPGA as a
processor element are also clarified in light of the concept of the Embedded Automaton. Notwithstanding, or rather because of the difference, MCUs and FPGAs are
expected to be integrated eventually, because flexible programming capability and
efficient implementation are often required in a system at the same time. Such
technology trend tells us that an MCU is not the only choice for developing intelligent
sensors of Internet of Things (IoT) applications. A dynamically reconfigurable
architecture (DRP) [3, 4] is often considered as a suitable candidate for embedded
applications, because it possesses both flexible programming capability and implementation efficiency. An advantage of dynamically reconfigurable architecture is
ultra-low power consumption. In comparison with a conventional MCU, power
consumption of 1/100 is expected for equivalent amount of computational as reported
in [5], because most of the chip area can be used for computational resources. Such
kind of advantage becomes good combination with atomic switches to realize high
processing speed with low power consumption. It is also explained in this chapter that
34
H. Hihara et al.