78
2 Fundamental Properties of Mem-Elements
• the pinched hysteresis loop in the (v, q) (resp., (i, ϕ)) plane is the hallmark
of all memcapacitors (resp., meminductors), and it can be used for an
experimental definition of memcapacitors (resp., meminductors), whether they
are ideal or not. The pinched hysteresis loop signature of memcapacitors (resp.,
meminductors) must hold for all periodic voltage or current inputs with zero
time-average. It follows that the measurement of a non-pinched hysteresis loop
for even just one such testing signal would disqualify a device from being
classified as a memcapacitor (resp., meminductor)
• pinched hysteresis loops of memcapacitors (resp., meminductors) don’t have
predicting ability because they represent just the device response to a specific
(sinusoidal or periodic) input.
Lastly, zero-crossing property is a key necessary condition to be satisfied for any
mem-element device
If It’s Not Pinched, It’s Not a Mem-Element!
but
Pinched Hysteresis Loops of Mem-Elements Are Not Models!
Remark 2.10 According to the considerations reported above, the example of
memcapacitor in [39] exhibiting a non-pinched hysteresis loop in the (v, q) plane is
misleading. Actually, such an error can be traced back to the associated capacitance
tending to infinity at the origin [40]. The paradox is easily solved as shown in the
Example 2.27.
Another two-terminal device that supposedly behaves as a memcapacitor and
displays a non-pinched hysteresis loop in the (v, q) plane is reported in [41]. As
remarked in [40], that device needs to be modeled by the connections of different
circuit element types including standard linear capacitors and resistors. Then, on
one hand it cannot be classified as just one single memcapacitor. On the other hand,
the observed non-pinched hysteresis loop can be traced back to the presence of both
standard capacitive and resistive elements, as it can be verified via a simple circuit
analysis [40].
Remark 2.11 The article [42] examined a ferromagnetic inductor (FML) to see
what new insights might be gained from a nonlinear circuit analysis of this familiar
element. The FML is realized using a nanocrystalline ferromagnetic toroidal core
of composition Fe 73.5 Si 13.5 B 9 Nb 3 Cu 1 and a wire winding of known resistance.
The experiments in that paper show that the device can be modeled in a first
approximation by a nonlinear inductor, i.e., a (−1, 0)-element in series with the
winding resistance. It is worth remarking that, contrary to what is claimed elsewhere
[39], the element does not correspond to a meminductor, i.e., a (−2, −1) element of
the periodic table.
2 Fundamental Properties of Mem-Elements
• the pinched hysteresis loop in the (v, q) (resp., (i, ϕ)) plane is the hallmark
of all memcapacitors (resp., meminductors), and it can be used for an
experimental definition of memcapacitors (resp., meminductors), whether they
are ideal or not. The pinched hysteresis loop signature of memcapacitors (resp.,
meminductors) must hold for all periodic voltage or current inputs with zero
time-average. It follows that the measurement of a non-pinched hysteresis loop
for even just one such testing signal would disqualify a device from being
classified as a memcapacitor (resp., meminductor)
• pinched hysteresis loops of memcapacitors (resp., meminductors) don’t have
predicting ability because they represent just the device response to a specific
(sinusoidal or periodic) input.
Lastly, zero-crossing property is a key necessary condition to be satisfied for any
mem-element device
If It’s Not Pinched, It’s Not a Mem-Element!
but
Pinched Hysteresis Loops of Mem-Elements Are Not Models!
Remark 2.10 According to the considerations reported above, the example of
memcapacitor in [39] exhibiting a non-pinched hysteresis loop in the (v, q) plane is
misleading. Actually, such an error can be traced back to the associated capacitance
tending to infinity at the origin [40]. The paradox is easily solved as shown in the
Example 2.27.
Another two-terminal device that supposedly behaves as a memcapacitor and
displays a non-pinched hysteresis loop in the (v, q) plane is reported in [41]. As
remarked in [40], that device needs to be modeled by the connections of different
circuit element types including standard linear capacitors and resistors. Then, on
one hand it cannot be classified as just one single memcapacitor. On the other hand,
the observed non-pinched hysteresis loop can be traced back to the presence of both
standard capacitive and resistive elements, as it can be verified via a simple circuit
analysis [40].
Remark 2.11 The article [42] examined a ferromagnetic inductor (FML) to see
what new insights might be gained from a nonlinear circuit analysis of this familiar
element. The FML is realized using a nanocrystalline ferromagnetic toroidal core
of composition Fe 73.5 Si 13.5 B 9 Nb 3 Cu 1 and a wire winding of known resistance.
The experiments in that paper show that the device can be modeled in a first
approximation by a nonlinear inductor, i.e., a (−1, 0)-element in series with the
winding resistance. It is worth remarking that, contrary to what is claimed elsewhere
[39], the element does not correspond to a meminductor, i.e., a (−2, −1) element of
the periodic table.